采用自振荡3X次谐波混频器前端的65nm CMOS 312GHz天线阵列接收器

2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2015-05-17 DOI:10.1109/RFIC.2015.7337694

Yen-Ju Chen, Ta-Shun Chu

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引用次数: 4

摘要

本文介绍了一种312GHz天线阵列接收机。接收机采用双转换超外差架构。第一次下变频由自振荡3X次谐波混频器前端完成，第二次下变频由吉尔伯特单元混频器和LO执行。该接收机与一个4元环形天线阵列共同设计和集成。通过将312 GHz的射频输入信号与96 GHz本端三次谐波混合，产生24 GHz的第一个中频(fIF1=fRF-3fLO1)。第二个LO的频率为22.3 GHz，第二个中频为1.7 GHz (fIF2=fIF1-fLO2)。天线阵列接收机从312GHz射频到1.7GHz中频的转换损耗为19 dB，带宽为-3dB，为1.2 GHz。它在65nm CMOS中实现。该芯片的面积为1.71 mm2，直流功耗为110 mW。

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A 312GHz antenna array receiver in 65nm CMOS utilizing self-oscillating 3X subharmonic mixer frontend

A 312GHz antenna array receiver is presented in this paper. The receiver is a double-conversion superheterodyne architecture. The first down-conversion is accomplished by a self-oscillating 3X subharmonic mixer frontend, and the second down-conversion is performed by a Gilbert-cell mixer and an LO. The receiver is co-designed and integrated with a 4-element loop antenna array. By mixing an RF input signal at 312 GHz with the 3rd harmonic of the 96 GHz LO, the first IF of 24 GHz is produced (fIF1=fRF-3fLO1). The second LO is at frequency of 22.3 GHz, and the second IF is 1.7 GHz (fIF2=fIF1-fLO2). The antenna array receiver exhibits a measured conversion loss of 19 dB from 312GHz RF to 1.7GHz IF, and has a -3dB bandwidth of 1.2 GHz. It is implemented in 65nm CMOS. The chip occupies an area of 1.71 mm2 and consumes DC power of 110 mW.

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2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

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