{"title":"通过台架测试和故障定位的准备和智能解决方案提高故障分析的成功率和效率","authors":"R. Kabadi, Leandro Muela","doi":"10.31399/asm.cp.istfa2022p0100","DOIUrl":null,"url":null,"abstract":"\n Failure Analysts are often required to work on a vast array of part types. These integrated circuits (IC) can have wide ranging functions and applications. Also, the ICs can be offered in a multitude of package types. All these factors compound the challenges faced by the Failure Analysts. This paper provides a brief snapshot of one approach adopted by the ON Semiconductor Product Analysis Labs to prepare in advance for the products that offer significant challenges in terms of electrical bench testing and fault localization. The approach demonstrates how the prospects of success of a given failure analysis (FA) case can be improved by making available smart solutions that cut down on the effort required for bench testing, defect localization and failure verification activities. This in turn can contribute to cycle time reduction and improve overall efficiency of the FA process.","PeriodicalId":417175,"journal":{"name":"International Symposium for Testing and Failure Analysis","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Improved Failure Analysis Success Rate & Efficiency Through Readiness & Smart Solutions for Bench Testing & Fault Localization\",\"authors\":\"R. Kabadi, Leandro Muela\",\"doi\":\"10.31399/asm.cp.istfa2022p0100\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\n Failure Analysts are often required to work on a vast array of part types. These integrated circuits (IC) can have wide ranging functions and applications. Also, the ICs can be offered in a multitude of package types. All these factors compound the challenges faced by the Failure Analysts. This paper provides a brief snapshot of one approach adopted by the ON Semiconductor Product Analysis Labs to prepare in advance for the products that offer significant challenges in terms of electrical bench testing and fault localization. The approach demonstrates how the prospects of success of a given failure analysis (FA) case can be improved by making available smart solutions that cut down on the effort required for bench testing, defect localization and failure verification activities. This in turn can contribute to cycle time reduction and improve overall efficiency of the FA process.\",\"PeriodicalId\":417175,\"journal\":{\"name\":\"International Symposium for Testing and Failure Analysis\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-10-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium for Testing and Failure Analysis\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.31399/asm.cp.istfa2022p0100\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium for Testing and Failure Analysis","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.31399/asm.cp.istfa2022p0100","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Improved Failure Analysis Success Rate & Efficiency Through Readiness & Smart Solutions for Bench Testing & Fault Localization
Failure Analysts are often required to work on a vast array of part types. These integrated circuits (IC) can have wide ranging functions and applications. Also, the ICs can be offered in a multitude of package types. All these factors compound the challenges faced by the Failure Analysts. This paper provides a brief snapshot of one approach adopted by the ON Semiconductor Product Analysis Labs to prepare in advance for the products that offer significant challenges in terms of electrical bench testing and fault localization. The approach demonstrates how the prospects of success of a given failure analysis (FA) case can be improved by making available smart solutions that cut down on the effort required for bench testing, defect localization and failure verification activities. This in turn can contribute to cycle time reduction and improve overall efficiency of the FA process.