基于soc的心律失常检测器设计

Tze Weng Ow, W. Y. Chia, R. Bakhteri, Y. Hau
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引用次数: 5

摘要

心律失常是一种心率不一致的心脏病。对于一些可能导致心脏骤停的心律失常,患者需要立即送往医院接受治疗。目前大多数心电图设备体积庞大,价格昂贵,而且不包括自我分类或解释能力。因此,不适合小型诊所和患者作为第一筛查设备。本文采用嵌入式软件设计,提出了一种基于soc的心律失常检测仪的实现方案。能够分析心率变异性(HRV),根据R-R间期特性对心律失常进行室性颤动(VF)、室性早搏(PVC)、二度心脏传导阻滞(20 block)的诊断和分类。对心电信号进行预处理,利用Pan和Tompkins算法提取R峰。心律失常可以通过基于知识的R-R区间分类来检测。该系统在Altera Video and Embedded Evaluation Kit with Multi-Touch (VEEK-MT) FPGA开发板上进行了原型设计。结果表明,基于MIT-BIH数据库,该系统能够对上述心律失常类型进行分类,平均检测准确率在85.71% ~ 93.61%之间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
SoC-based design of arrhythmia detector
Arrhythmia is a heart disease where the heart rate is inconsistent. For some arrhythmias that can cause sudden cardiac arrest, the patient needs to be sent to the hospital for immediate treatment. Most of the current electrocardiogram (ECG) devices are bulky, cost expensive, and does not include the self-classification or interpretation ability. Hence it is not suitable for small clinics and patients to use as the first screening devices. This paper proposed a SoC-based implementation of arrhythmia detector by using embedded software design. It able to analyze the heart rate variability (HRV), diagnose and classify the arrhythmias in terms of ventricular fibrillation (VF), premature ventricular contraction (PVC), and two degree heart block (2o Block) base on the R-R interval properties. The ECG signal is pre-processed and extract the R peak using Pan and Tompkins algorithm. The arrhythmia can be detected based on knowledge-based classification of the R-R intervals. The proposed system is prototyped on the Altera Video and Embedded Evaluation Kit with Multi-Touch (VEEK-MT) FPGA development board. Results shows that the proposed system able to classify the aforementioned arrhythmia types with convincing average detection accuracy in range of 85.71% to 93.61% based on MIT-BIH database.
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