用于电源管理系统中高效栅极驱动器的高压电荷存储自举电路

A. Seidel, M. Costa, J. Joos, B. Wicht
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引用次数: 9

摘要

自举电路主要用于提供栅极驱动电路,为高边NMOS晶体管提供栅极超速驱动电压。所需的电荷必须由自举电容器提供,如果必须保证电容器处的可接受电压降,则该电容通常太大而无法集成。提出了三种适用于双NMOS晶体管输出级高侧驱动器的面积高效自举电路方案。关键思想是主引导电容器由第二个引导电容器支持,第二个引导电容器充电到更高的电压并在栅极驱动器打开时连接。在第二电容器处的高电压摆动导致高电荷分配。与传统的自举电路相比,这两种自举电容器需要的面积减少了70%。这使得紧凑的电源管理系统具有更少的分立元件和更小的芯片尺寸。给出了自举电容最佳尺寸的计算准则。该电路采用180nm高压BiCMOS技术制造,作为高压栅极驱动器的一部分。测量结果证实了高压电荷存储的好处。完全集成的自举电路包括两个堆叠的75.8pF和18.9pF电容器,导致电压下降低于1V。这与计算准则的理论吻合得很好。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Bootstrap circuit with high-voltage charge storing for area efficient gate drivers in power management systems
Bootstrap circuits are mainly used for supplying a gate driver circuit to provide the gate overdrive voltage for a high-side NMOS transistor. The required charge has to be provided by a bootstrap capacitor which is often too large for integration if an acceptable voltage dip at the capacitor has to be guaranteed. Three options of an area efficient bootstrap circuit for a high side driver with an output stage of two NMOS transistors are proposed. The key idea is that the main bootstrap capacitor is supported by a second bootstrap capacitor, which is charged to a higher voltage and connected when the gate driver turns on. A high voltage swing at the second capacitor leads to a high charge allocation. Both bootstrap capacitors require up to 70% less area compared to a conventional bootstrap circuit. This enables compact power management systems with fewer discrete components and smaller die size. A calculation guideline for optimum bootstrap capacitor sizing is given. The circuit was manufactured in a 180nm high-voltage BiCMOS technology as part of a high-voltage gate driver. Measurements confirm the benefit of high-voltage charge storing. The fully integrated bootstrap circuit including two stacked 75.8pF and 18.9pF capacitors results in a voltage dip lower than 1V. This matches well with the theory of the calculation guideline.
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