{"title":"用于多数据路径DSP的块浮点系统","authors":"S. Kobayashi, G. Fettweis","doi":"10.1109/SIPS.1998.715805","DOIUrl":null,"url":null,"abstract":"In order to give an answer to the question of the arithmetic representation in future DSP architectures for mobile communication applications, the signal processing quality of different arithmetic representations has been studied. Based on the result, an implementation of a novel block-floating multiple datapath DSP has been developed. This implementation allows a superior signal processing performance compared to that of short-word floating-point or conventional block-floating-point.","PeriodicalId":151031,"journal":{"name":"1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A block-floating-point system for multiple datapath DSP\",\"authors\":\"S. Kobayashi, G. Fettweis\",\"doi\":\"10.1109/SIPS.1998.715805\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In order to give an answer to the question of the arithmetic representation in future DSP architectures for mobile communication applications, the signal processing quality of different arithmetic representations has been studied. Based on the result, an implementation of a novel block-floating multiple datapath DSP has been developed. This implementation allows a superior signal processing performance compared to that of short-word floating-point or conventional block-floating-point.\",\"PeriodicalId\":151031,\"journal\":{\"name\":\"1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-10-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIPS.1998.715805\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.1998.715805","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A block-floating-point system for multiple datapath DSP
In order to give an answer to the question of the arithmetic representation in future DSP architectures for mobile communication applications, the signal processing quality of different arithmetic representations has been studied. Based on the result, an implementation of a novel block-floating multiple datapath DSP has been developed. This implementation allows a superior signal processing performance compared to that of short-word floating-point or conventional block-floating-point.