{"title":"交错中继器高性能总线的节能编码","authors":"S. Jayaprakash, N. Mahapatra","doi":"10.1109/ISVLSI.2009.58","DOIUrl":null,"url":null,"abstract":"High-performance buses often use staggered repeaters to mitigate the adverse impact on latency of worst-case capacitive crosstalk between adjacent wires by exploiting the data-dependent nature of crosstalk. An undesirable side effect of staggered repeaters is that they may increase the overall energy of a bus carrying highly correlated traffic associated with real-world benchmarks. In this paper, we introduce an energy model for a staggered-repeater bus (SRB)configuration and propose a low-power dynamic encoding scheme that yields average bus energy reductions for an SRB in excess of 28% and 26% for data and instruction traffic, respectively, for SPEC CPU2k benchmarks.","PeriodicalId":137508,"journal":{"name":"2009 IEEE Computer Society Annual Symposium on VLSI","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Energy-Efficient Encoding for High-Performance Buses with Staggered Repeaters\",\"authors\":\"S. Jayaprakash, N. Mahapatra\",\"doi\":\"10.1109/ISVLSI.2009.58\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High-performance buses often use staggered repeaters to mitigate the adverse impact on latency of worst-case capacitive crosstalk between adjacent wires by exploiting the data-dependent nature of crosstalk. An undesirable side effect of staggered repeaters is that they may increase the overall energy of a bus carrying highly correlated traffic associated with real-world benchmarks. In this paper, we introduce an energy model for a staggered-repeater bus (SRB)configuration and propose a low-power dynamic encoding scheme that yields average bus energy reductions for an SRB in excess of 28% and 26% for data and instruction traffic, respectively, for SPEC CPU2k benchmarks.\",\"PeriodicalId\":137508,\"journal\":{\"name\":\"2009 IEEE Computer Society Annual Symposium on VLSI\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-05-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE Computer Society Annual Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2009.58\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Computer Society Annual Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2009.58","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Energy-Efficient Encoding for High-Performance Buses with Staggered Repeaters
High-performance buses often use staggered repeaters to mitigate the adverse impact on latency of worst-case capacitive crosstalk between adjacent wires by exploiting the data-dependent nature of crosstalk. An undesirable side effect of staggered repeaters is that they may increase the overall energy of a bus carrying highly correlated traffic associated with real-world benchmarks. In this paper, we introduce an energy model for a staggered-repeater bus (SRB)configuration and propose a low-power dynamic encoding scheme that yields average bus energy reductions for an SRB in excess of 28% and 26% for data and instruction traffic, respectively, for SPEC CPU2k benchmarks.