{"title":"开罗大学SPARC“CUSPARC”嵌入式处理器的ASIC实现","authors":"Amr A. Z. Suleiman, Alhassan F. Khedr, S. Habib","doi":"10.1109/ICM.2010.5696182","DOIUrl":null,"url":null,"abstract":"Cairo University SPARC “CUSPARC” processor is an IP embedded processor core conforming to SPARC V8 ISA. CUSPARC is fully developed at Cairo University and is the first Egyptian processor. In this paper, the ASIC Implementation and Verification of the CUSPARC processor is described at 130nm technology node. CUSPARC scores a typical clock frequency of 260MHz, power dissipation of 0.11 mW/MHz and power Efficiency of 8.78 DMIPS/mW, which makes it very suitable for embedded and real-time systems.","PeriodicalId":215859,"journal":{"name":"2010 International Conference on Microelectronics","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"ASIC Implementation of Cairo University SPARC “CUSPARC” embedded processor\",\"authors\":\"Amr A. Z. Suleiman, Alhassan F. Khedr, S. Habib\",\"doi\":\"10.1109/ICM.2010.5696182\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Cairo University SPARC “CUSPARC” processor is an IP embedded processor core conforming to SPARC V8 ISA. CUSPARC is fully developed at Cairo University and is the first Egyptian processor. In this paper, the ASIC Implementation and Verification of the CUSPARC processor is described at 130nm technology node. CUSPARC scores a typical clock frequency of 260MHz, power dissipation of 0.11 mW/MHz and power Efficiency of 8.78 DMIPS/mW, which makes it very suitable for embedded and real-time systems.\",\"PeriodicalId\":215859,\"journal\":{\"name\":\"2010 International Conference on Microelectronics\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Conference on Microelectronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2010.5696182\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Microelectronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2010.5696182","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
ASIC Implementation of Cairo University SPARC “CUSPARC” embedded processor
Cairo University SPARC “CUSPARC” processor is an IP embedded processor core conforming to SPARC V8 ISA. CUSPARC is fully developed at Cairo University and is the first Egyptian processor. In this paper, the ASIC Implementation and Verification of the CUSPARC processor is described at 130nm technology node. CUSPARC scores a typical clock frequency of 260MHz, power dissipation of 0.11 mW/MHz and power Efficiency of 8.78 DMIPS/mW, which makes it very suitable for embedded and real-time systems.
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