{"title":"用于高温辐射环境的存储器设计","authors":"Tai-hua Chen, Lawrence T. Clark, K. Holbert","doi":"10.1109/RELPHY.2008.4558870","DOIUrl":null,"url":null,"abstract":"This paper presents bulk CMOS memory circuits capable of both ultra-low voltage (subthreshold, i.e., VDD less than the transistor threshold voltage Vth) low power operation and high temperature operation at nominal VDD. One of the memory designs is radiation hardened by design (RHBD) using interleaved DICE storage cells, enclosed transistor geometries, and P-type guard rings. The other is not hardened against radiation. Experimental results are presented showing that the room temperature minimum VDD of the hardened device remains essentially unchanged from the pre-irradiation VDDMIN = 210 mV value after Co-60 irradiation to 4 Mrad(Si). The standby power supply current ISB of the device increases less than 2x from this level of irradiation. The RHBD memory design has been tested to be operational at temperatures of 225degC. The combined effects of high temperature and irradiation are also investigated for both designs.","PeriodicalId":187696,"journal":{"name":"2008 IEEE International Reliability Physics Symposium","volume":"100 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Memory design for high temperature radiation environments\",\"authors\":\"Tai-hua Chen, Lawrence T. Clark, K. Holbert\",\"doi\":\"10.1109/RELPHY.2008.4558870\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents bulk CMOS memory circuits capable of both ultra-low voltage (subthreshold, i.e., VDD less than the transistor threshold voltage Vth) low power operation and high temperature operation at nominal VDD. One of the memory designs is radiation hardened by design (RHBD) using interleaved DICE storage cells, enclosed transistor geometries, and P-type guard rings. The other is not hardened against radiation. Experimental results are presented showing that the room temperature minimum VDD of the hardened device remains essentially unchanged from the pre-irradiation VDDMIN = 210 mV value after Co-60 irradiation to 4 Mrad(Si). The standby power supply current ISB of the device increases less than 2x from this level of irradiation. The RHBD memory design has been tested to be operational at temperatures of 225degC. The combined effects of high temperature and irradiation are also investigated for both designs.\",\"PeriodicalId\":187696,\"journal\":{\"name\":\"2008 IEEE International Reliability Physics Symposium\",\"volume\":\"100 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE International Reliability Physics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RELPHY.2008.4558870\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RELPHY.2008.4558870","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Memory design for high temperature radiation environments
This paper presents bulk CMOS memory circuits capable of both ultra-low voltage (subthreshold, i.e., VDD less than the transistor threshold voltage Vth) low power operation and high temperature operation at nominal VDD. One of the memory designs is radiation hardened by design (RHBD) using interleaved DICE storage cells, enclosed transistor geometries, and P-type guard rings. The other is not hardened against radiation. Experimental results are presented showing that the room temperature minimum VDD of the hardened device remains essentially unchanged from the pre-irradiation VDDMIN = 210 mV value after Co-60 irradiation to 4 Mrad(Si). The standby power supply current ISB of the device increases less than 2x from this level of irradiation. The RHBD memory design has been tested to be operational at temperatures of 225degC. The combined effects of high temperature and irradiation are also investigated for both designs.