Sub-50 nm NAND闪存串中程序干扰机制的详细物理模拟

2010 International Conference on Simulation of Semiconductor Processes and Devices Pub Date : 2010-10-14 DOI:10.1109/SISPAD.2010.5604512

C. D. Nguyen, A. Kuligk, M. Vexler, M. Klawitter, V. Beyer, T. Melde, M. Czernohorsky, B. Meinerzhagen

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引用次数: 1

摘要

本文首次采用一种新的专用先进物理模拟方案，详细研究了NAND结构非易失性存储器编程过程中热电子诱导对抑制位线中存储信息的干扰机制。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Detailed physical simulation of program disturb mechanisms in Sub-50 nm NAND flash memory strings

The hot electron induced mechanism disturbing the stored information in inhibited bit lines during the programming of nonvolatile memories with NAND architecture is studied in detail using a new dedicated advanced physical simulation scheme for the first time.

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2010 International Conference on Simulation of Semiconductor Processes and Devices

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