交互式演示:超动态电压标度的过程容忍β比调制

Myeong-Eun Hwang, T. Cakici, Kaushik Roy
{"title":"交互式演示:超动态电压标度的过程容忍β比调制","authors":"Myeong-Eun Hwang, T. Cakici, Kaushik Roy","doi":"10.1145/1266366.1266705","DOIUrl":null,"url":null,"abstract":"Most wireless and hand-held gadgets work in burst mode, and the performance demand varies with time. When the performance requirement is low, the supply voltage can be dithered and the circuit can enter from superthreshold region to subthreshold region (Vdd < VT). Such ultra dynamic voltage scaling (UDVS), where the supply voltage switches from 1.2V to 200mV (say), enables remarkable decrease in power consumption with \"acceptable\" performance penalty in the non-burst mode of operation. However, subthreshold operation is very sensitive to process variation (PV) due to the reduced noise margin, and may not work properly unless corrective measures are taken. In this paper, we model the trip voltage in both subthreshold and superthreshold regions, and analyze the impact of PV in UDVS. We also propose a circuit design technique such that the same logic gate can efficiently operate in both superthreshold and subthreshold regions under PV. We do that by modulating the β-ratio (P-to-N ratio) of the logic gates. By proper β-ratio modulation, we show that the proposed methodologies can lower energy dissipation per cycle by more than an order of magnitude (42X) in non-burst mode with reduced impact to PVs.","PeriodicalId":205976,"journal":{"name":"Design, Automation and Test in Europe","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Interactive presentation: Process tolerant β-ratio modulation for ultra-dynamic voltage scaling\",\"authors\":\"Myeong-Eun Hwang, T. Cakici, Kaushik Roy\",\"doi\":\"10.1145/1266366.1266705\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Most wireless and hand-held gadgets work in burst mode, and the performance demand varies with time. When the performance requirement is low, the supply voltage can be dithered and the circuit can enter from superthreshold region to subthreshold region (Vdd < VT). Such ultra dynamic voltage scaling (UDVS), where the supply voltage switches from 1.2V to 200mV (say), enables remarkable decrease in power consumption with \\\"acceptable\\\" performance penalty in the non-burst mode of operation. However, subthreshold operation is very sensitive to process variation (PV) due to the reduced noise margin, and may not work properly unless corrective measures are taken. In this paper, we model the trip voltage in both subthreshold and superthreshold regions, and analyze the impact of PV in UDVS. We also propose a circuit design technique such that the same logic gate can efficiently operate in both superthreshold and subthreshold regions under PV. We do that by modulating the β-ratio (P-to-N ratio) of the logic gates. By proper β-ratio modulation, we show that the proposed methodologies can lower energy dissipation per cycle by more than an order of magnitude (42X) in non-burst mode with reduced impact to PVs.\",\"PeriodicalId\":205976,\"journal\":{\"name\":\"Design, Automation and Test in Europe\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-04-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Design, Automation and Test in Europe\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1266366.1266705\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Design, Automation and Test in Europe","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1266366.1266705","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

摘要

大多数无线和手持设备工作在突发模式下,性能需求随时间而变化。当性能要求较低时,电源电压可以抖动,电路可以从超阈值区域进入亚阈值区域(Vdd < VT)。这种超动态电压缩放(UDVS),其中电源电压从1.2V切换到200mV(例如),可以显著降低功耗,并且在非突发操作模式下具有“可接受”的性能损失。然而,由于噪声裕度降低,亚阈值操作对过程变化(PV)非常敏感,除非采取纠正措施,否则可能无法正常工作。在本文中,我们建立了亚阈值和超阈值区域的跳闸电压模型,并分析了PV对UDVS的影响。我们还提出了一种电路设计技术,使同一逻辑门可以有效地在PV下的超阈值和亚阈值区域工作。我们通过调制逻辑门的β比(P-to-N比)来做到这一点。通过适当的β-比率调制,我们表明所提出的方法可以在非突发模式下将每个周期的能量耗散降低超过一个数量级(42倍),同时减少对pv的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Interactive presentation: Process tolerant β-ratio modulation for ultra-dynamic voltage scaling
Most wireless and hand-held gadgets work in burst mode, and the performance demand varies with time. When the performance requirement is low, the supply voltage can be dithered and the circuit can enter from superthreshold region to subthreshold region (Vdd < VT). Such ultra dynamic voltage scaling (UDVS), where the supply voltage switches from 1.2V to 200mV (say), enables remarkable decrease in power consumption with "acceptable" performance penalty in the non-burst mode of operation. However, subthreshold operation is very sensitive to process variation (PV) due to the reduced noise margin, and may not work properly unless corrective measures are taken. In this paper, we model the trip voltage in both subthreshold and superthreshold regions, and analyze the impact of PV in UDVS. We also propose a circuit design technique such that the same logic gate can efficiently operate in both superthreshold and subthreshold regions under PV. We do that by modulating the β-ratio (P-to-N ratio) of the logic gates. By proper β-ratio modulation, we show that the proposed methodologies can lower energy dissipation per cycle by more than an order of magnitude (42X) in non-burst mode with reduced impact to PVs.
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