用于模拟集成电路的新型互补晶体管结构

T. Kikkawa, T. Suganuma, K. Tanaka, T. Hara
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引用次数: 3

摘要

一种新的互补晶体管结构已经被开发出来。本文提出了一种为模拟集成电路提供完全互补晶体管结构的新技术。该pnp晶体管采用三重扩散工艺在p型衬底上的n型外延层中制备,并通过在p+集电极埋设层与衬底之间插入n离子注入层与衬底隔离。与传统的pnp晶体管相比,该技术在增益带宽积fT、最大集电极电流IC(max)和集电极饱和电压VCE(sat)方面提高了5到10倍。因此,可以得到与npn晶体管完全互补的pnp晶体管。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A new complementary transistor structure for analog integrated circuits
A new complementary transistor structure has been developed. This paper presents a new technique which provides a fully complementary transistor structure for analog integrated circuits. The pnp transistor is fabricated by triple diffusion process in n type epitaxial layer on p type substrate, and is isolated from the substrate by inserting n- ion implanted layer between p+ collector buried layer and the substrate. This technique results in 5 to 10 times improvement in gain bandwidth product fT, maximum collector current IC(max)and collector saturation voltage VCE(sat)in comparison with conventional pnp transistors. Consequently, a fully complementary pnp transistor to npn transistors can be obtained.
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