多速率CMOS电路仿真的延迟插入法(LIM)

2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2011-12-12 DOI:10.1109/EPEPS.2011.6100205

P. Goh, J. Schutt-Ainé

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引用次数: 11

摘要

本文提出了延迟插入法(LIM)在CMOS电路瞬态仿真中的应用，并将其与传统的基于SPICE的方法进行了比较。此外，我们扩展了多速率仿真技术，并将其应用于LIM环境下的CMOS电路仿真，并说明其在基本LIM环境下的计算效率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Latency insertion method (LIM) for CMOS circuit simulations with multi-rate considerations

In this paper, we present an application of the latency insertion method (LIM) to the transient simulations of CMOS circuits and compare it to traditional SPICE based methods. In addition, we extend the multi-rate simulation technique and apply it to the simulation of CMOS circuits in the LIM environment and illustrate its computational efficiently over the basic LIM.

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2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems

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