{"title":"基于快速自动频率控制的2.9 ghz LC-VCO锁相环","authors":"Hui-Dong Lee, Nam-Sik Ryu, J. Jung, Kwangchun Lee","doi":"10.1109/ISWCS.2012.6328490","DOIUrl":null,"url":null,"abstract":"A 2.9-GHz LC-VCO based PLL with a fast automatic frequency control (AFC) circuit is proposed. The fast AFC function is achieved by a fourfold reference frequency multiplication and a binary searching algorithm in a 4-bit capacitor array of an LC-VCO and completed in 4-cycles of the reference signal. The simulation results for the proposed PLL designed in a CMOS 130 nm process, show that an AFC time of only 100 ns, operation frequencies of 2.14 to 2.95 GHz, and a phase noise of -125 dBc/Hz at 1 MHz offset, while dissipating 4.9 mA at a 1.2-V supply.","PeriodicalId":167119,"journal":{"name":"2012 International Symposium on Wireless Communication Systems (ISWCS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 2.9-GHz LC-VCO based PLL with a fast automatic frequency control\",\"authors\":\"Hui-Dong Lee, Nam-Sik Ryu, J. Jung, Kwangchun Lee\",\"doi\":\"10.1109/ISWCS.2012.6328490\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 2.9-GHz LC-VCO based PLL with a fast automatic frequency control (AFC) circuit is proposed. The fast AFC function is achieved by a fourfold reference frequency multiplication and a binary searching algorithm in a 4-bit capacitor array of an LC-VCO and completed in 4-cycles of the reference signal. The simulation results for the proposed PLL designed in a CMOS 130 nm process, show that an AFC time of only 100 ns, operation frequencies of 2.14 to 2.95 GHz, and a phase noise of -125 dBc/Hz at 1 MHz offset, while dissipating 4.9 mA at a 1.2-V supply.\",\"PeriodicalId\":167119,\"journal\":{\"name\":\"2012 International Symposium on Wireless Communication Systems (ISWCS)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Symposium on Wireless Communication Systems (ISWCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISWCS.2012.6328490\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Symposium on Wireless Communication Systems (ISWCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISWCS.2012.6328490","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 2.9-GHz LC-VCO based PLL with a fast automatic frequency control
A 2.9-GHz LC-VCO based PLL with a fast automatic frequency control (AFC) circuit is proposed. The fast AFC function is achieved by a fourfold reference frequency multiplication and a binary searching algorithm in a 4-bit capacitor array of an LC-VCO and completed in 4-cycles of the reference signal. The simulation results for the proposed PLL designed in a CMOS 130 nm process, show that an AFC time of only 100 ns, operation frequencies of 2.14 to 2.95 GHz, and a phase noise of -125 dBc/Hz at 1 MHz offset, while dissipating 4.9 mA at a 1.2-V supply.
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