{"title":"一个0.5 V前馈δ - σ调制器与基于逆变器的积分器","authors":"Jun Wang, T. Matsuoka, K. Taniguchi","doi":"10.1109/ESSCIRC.2009.5325936","DOIUrl":null,"url":null,"abstract":"This paper presents an inverter-based switched-capacitor integrator for 0.5 V low-voltage applications. The proposed integrator utilizing floating voltage source and forward body bias obtains high performance as well as good independence of variations in process and temperature. It is applied to a 0.5 V feedforward AD modulator. The test results indicate that the designed AD modulator achieves a peak SNDR of 71 dB in a 78 kHz bandwidth, and the core power consumption is only 860 µW. This work is designed in a standard 0.18 µm CMOS process.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"A 0.5 V feedforward delta-sigma modulator with inverter-based integrator\",\"authors\":\"Jun Wang, T. Matsuoka, K. Taniguchi\",\"doi\":\"10.1109/ESSCIRC.2009.5325936\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an inverter-based switched-capacitor integrator for 0.5 V low-voltage applications. The proposed integrator utilizing floating voltage source and forward body bias obtains high performance as well as good independence of variations in process and temperature. It is applied to a 0.5 V feedforward AD modulator. The test results indicate that the designed AD modulator achieves a peak SNDR of 71 dB in a 78 kHz bandwidth, and the core power consumption is only 860 µW. This work is designed in a standard 0.18 µm CMOS process.\",\"PeriodicalId\":258889,\"journal\":{\"name\":\"2009 Proceedings of ESSCIRC\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-11-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 Proceedings of ESSCIRC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2009.5325936\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 Proceedings of ESSCIRC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2009.5325936","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.5 V feedforward delta-sigma modulator with inverter-based integrator
This paper presents an inverter-based switched-capacitor integrator for 0.5 V low-voltage applications. The proposed integrator utilizing floating voltage source and forward body bias obtains high performance as well as good independence of variations in process and temperature. It is applied to a 0.5 V feedforward AD modulator. The test results indicate that the designed AD modulator achieves a peak SNDR of 71 dB in a 78 kHz bandwidth, and the core power consumption is only 860 µW. This work is designed in a standard 0.18 µm CMOS process.
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