Yield Improvement Using a Fast Product Wafer Level Monitoring System

A Scribe Characterization Vehiclereg (CVreg) test chip has been developed to enable a fast turn around mass production yield monitoring system. The test chip design is being placed within the scribe lines of product chip reticles, efficiently utilizing three-dimensional stacking of test structures. During manufacturing, wafer level testing will be executed using pdFasTestreg to ensure test times below 10 minutes per 300 mm wafer. The measurement data will then be analyzed using pdCVtrade to determine yield predictive data like fail rates and defect densities. Also variability data of layer specific parameters like sheet resistance and contact/via resistance will be extracted. Finally, extensive statistical analysis will be run using dataPOWERtrade to derive correlation to product yield as well as lot equipment history