A novel approach to etch-process-aware intensive layout retarget

Patterning, a major process in semiconductor manufacturing, aims to transfer the design layout to the wafer. Accordingly, the "process proximity correction" method was developed to overcome the difference in after-cleaninginspected CD (critical dimension) between patterns of similar shapes. However, its physical model is often limited in the predictive performance. Therefore, recent studies have introduced ML (machine learning) technology to supplement model accuracy, but this approach often has an inherent risk of overfitting depending on the type of sampled pattern. In this study, we present a newly invented flow capable of stable etch-process-aware ML modeling by model reconstruction and large amounts of measurement data. The new modeling flow can also be performed within a reasonable runtime through efficient feature extraction. Based on the new model and its related layout targeting platform, intensive improvements were made to CD targeting and spread; for a given layout, in comparison with delicate rule-based modification, the CD targeting accuracy was improved by 4 times and approaches the limit of metrology error.