基于分层网络表表示的门矩阵布局

[1991] Proceedings. First Great Lakes Symposium on VLSI Pub Date : 1991-03-01 DOI:10.1109/GLSV.1991.143981

Shigeki Yamada, K. Yamazaki

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引用次数: 0

摘要

提出了一种基于新网表的分层门矩阵布局算法。该方法考虑了逻辑等价性，利用多终端网络的特殊特性克服了贪心方法的缺点。CMOS电路的实验结果远远优于另一种已发表的方法。

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Gate matrix layout based on hierarchical net-list representations

The authors propose a hierarchical gate matrix layout algorithm based on a new net-list. It has remarkable features such that logical equivalence is considered, and the drawback of the greedy method can be overcome by using special features of multiterminal nets. Experimental results for CMOS circuits are far superior to those obtained by another published method.<>

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[1991] Proceedings. First Great Lakes Symposium on VLSI

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