{"title":"带有内部处理器核心的传输调制解调器专用集成电路","authors":"J. Geier, K. Lucke, I. Rudorff, R. Wimmer","doi":"10.1109/EASIC.1990.207982","DOIUrl":null,"url":null,"abstract":"Describes the integration of an 80C51 microprocessor with three different ASICs, and especially focuses on the design method, which meets the requirements of a very high success rate. The ASIC EDLC (envelope data link controller) is used for a transmission modem. A whole board with new features was implemented in the EDT. Design for testability embedded in the chip is also described.<<ETX>>","PeriodicalId":205695,"journal":{"name":"[Proceedings] EURO ASIC `90","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An ASIC for a transmission modem with an internal processor core\",\"authors\":\"J. Geier, K. Lucke, I. Rudorff, R. Wimmer\",\"doi\":\"10.1109/EASIC.1990.207982\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Describes the integration of an 80C51 microprocessor with three different ASICs, and especially focuses on the design method, which meets the requirements of a very high success rate. The ASIC EDLC (envelope data link controller) is used for a transmission modem. A whole board with new features was implemented in the EDT. Design for testability embedded in the chip is also described.<<ETX>>\",\"PeriodicalId\":205695,\"journal\":{\"name\":\"[Proceedings] EURO ASIC `90\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-05-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings] EURO ASIC `90\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EASIC.1990.207982\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] EURO ASIC `90","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EASIC.1990.207982","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An ASIC for a transmission modem with an internal processor core
Describes the integration of an 80C51 microprocessor with three different ASICs, and especially focuses on the design method, which meets the requirements of a very high success rate. The ASIC EDLC (envelope data link controller) is used for a transmission modem. A whole board with new features was implemented in the EDT. Design for testability embedded in the chip is also described.<>