{"title":"基于CMOS/VCSEL混合阵列的光互连","authors":"A. Krishnamoorthy, R. Rozier","doi":"10.1109/PI.1999.806392","DOIUrl":null,"url":null,"abstract":"Summary form only given. The authors discuss the concept of a manufacturable technology that can provide parallel optical interconnects directly to a VLSI circuit. Before such a technology can be deployed on a large scale, several issues related to the scalability of the optoelectronic technology and its compatibility with deep sub-micron CMOS technologies must be addressed. In terms of the VCSELs, the challenge will be in producing arrays of VCSELs that can be attached to CMOS circuits with high yield, and be simultaneously operated at high speeds. In terms of the circuits, the challenges will be to continue to improve receiver sensitivity while reducing power dissipation and crosstalk. A final consideration is that of the systems integration, where the challenge will be to package systems that can efficiently transport large arrays of light beams to and from such chips.","PeriodicalId":157032,"journal":{"name":"Proceedings. 6th International Conference on Parallel Interconnects (PI'99) (Formerly Known as MPPOI)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Optical interconnects based on hybrid CMOS/VCSEL arrays\",\"authors\":\"A. Krishnamoorthy, R. Rozier\",\"doi\":\"10.1109/PI.1999.806392\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given. The authors discuss the concept of a manufacturable technology that can provide parallel optical interconnects directly to a VLSI circuit. Before such a technology can be deployed on a large scale, several issues related to the scalability of the optoelectronic technology and its compatibility with deep sub-micron CMOS technologies must be addressed. In terms of the VCSELs, the challenge will be in producing arrays of VCSELs that can be attached to CMOS circuits with high yield, and be simultaneously operated at high speeds. In terms of the circuits, the challenges will be to continue to improve receiver sensitivity while reducing power dissipation and crosstalk. A final consideration is that of the systems integration, where the challenge will be to package systems that can efficiently transport large arrays of light beams to and from such chips.\",\"PeriodicalId\":157032,\"journal\":{\"name\":\"Proceedings. 6th International Conference on Parallel Interconnects (PI'99) (Formerly Known as MPPOI)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 6th International Conference on Parallel Interconnects (PI'99) (Formerly Known as MPPOI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PI.1999.806392\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 6th International Conference on Parallel Interconnects (PI'99) (Formerly Known as MPPOI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PI.1999.806392","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optical interconnects based on hybrid CMOS/VCSEL arrays
Summary form only given. The authors discuss the concept of a manufacturable technology that can provide parallel optical interconnects directly to a VLSI circuit. Before such a technology can be deployed on a large scale, several issues related to the scalability of the optoelectronic technology and its compatibility with deep sub-micron CMOS technologies must be addressed. In terms of the VCSELs, the challenge will be in producing arrays of VCSELs that can be attached to CMOS circuits with high yield, and be simultaneously operated at high speeds. In terms of the circuits, the challenges will be to continue to improve receiver sensitivity while reducing power dissipation and crosstalk. A final consideration is that of the systems integration, where the challenge will be to package systems that can efficiently transport large arrays of light beams to and from such chips.