集成缓冲结构的低噪声超结MOSFET

2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2018-05-13 DOI:10.1109/ISPSD.2018.8393595

Hiroaki Yamashita, S. Ono, H. Ichijo, M. Tsuji, T. Yasuzumi, M. Izumisawa, W. Saito

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引用次数: 7

摘要

提出了一种具有分布式内部缓冲区的超结(SJ)-MOSFET结构。由栅极、氧化物和p型柱组成的RC网络在各端之间提供频率相关的电容耦合。缓冲区仅在高频频段充当栅极漏极电容(Cgd)。关断过程中产生的开关噪声被缓冲器吸收而不增加开关损耗。我们通过仿真和实验验证了这个概念，并证实了EMI(电磁干扰)和效率之间更好的权衡。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low noise superjunction MOSFET with integrated snubber structure

Novel superjunction (SJ)-MOSFET structure with distributed internal snubber area is proposed. RC network composed by gate electrode, oxide and P-type pillar provides frequency-dependent capacitive coupling between each terminal. The snubber area acts as gate-drain capacitance (Cgd) only at high-frequency band. Switching noise generated during turn-off transient is absorbed by the snubber without increasing switching loss. We verified the concept by simulation and experiments, and confirmed better trade-off between EMI (Electromagnetic interference) and efficiency.

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来源期刊

2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD)

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