Lookup Table Modular Reduction: A Low-Latency Modular Reduction for Fast ECC Processor

Modular multiplication is used extensively in many cryptosystems, such as in Elliptic Curve Cryptography (ECC). This is why the speed of the modular multiplication has a high impact on the overall speed of the cryptography computation. Recent works utilizing a lookup table for inferring value have shown a promising way for fast computation of modular re-duction, which can be used to construct a much faster modular multiplier than the conventional methods on FPGA. In this work, we explore an alternative way to implement the said technique, which we will call Lookup Table Modular Reduction (LUTMR). We show that in this technique, the modulo value used for generating the modular reduction circuit has a high impact on the generated circuit efficiency. With the LUTMR technique, three modular multipliers for curve Secp256k1, NIST-P384, and BLS12-381 are implemented on FPGA, which has shown to be the fastest compared to recent works. The NIST-P384 ECC processor is also implemented with the designed modular multiplier. It can compute the scalar multiplication in $75.08 \ \mu \mathrm{s}$, the fastest and lowest in Time-Area criteria among recent works.