基于CNFET的低功耗随机存储器电池设计

2018 4th International Conference on Recent Advances in Information Technology (RAIT) Pub Date : 2018-03-01 DOI:10.1109/RAIT.2018.8389016

Srinithya Nagiri, S. Majumder, Riya, A. Islam

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引用次数: 1

摘要

本文提出了一种基于CNFET的以忆阻器为存储元件的新型随机存储器单元。所提出的RRAM单元的设计方式解决了半选择问题。仿真结果比较了所提出的RRAM单元和之前的2T2M RRAM单元的关键设计指标。在标称VDD下，由于使用MTCMOS功耗降低技术，所提出的RRAM单元比2T2M单元实现了6.13倍的低读取延迟和33倍的低保持功率。它是一个半选择自由的非易失性RRAM单元，具有更快的读取操作，而且它也很节能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design of low power RRAM cell using CNFET

This paper presents a CNFET based novel RRAM cell using memristor as memory element. The proposed RRAM cell is designed in such a way that half-select issue is resolved. Simulation results of critical design metrics of the proposed RRAM cell and previous 2T2M RRAM cell are compared. The proposed RRAM cell achieves 6.13x lower read delay along with 33x lower hold power due to use of MTCMOS power reduction technique than 2T2M cell at nominal VDD. It is a half-select free non-volatile RRAM cell with faster read operation and it is also power efficient.

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2018 4th International Conference on Recent Advances in Information Technology (RAIT)

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