{"title":"一个4位，13.5 g采样/秒的跟踪保持电路","authors":"I-Hsin Wang, Shen-Iuan Liu","doi":"10.1109/VDAT.2007.373231","DOIUrl":null,"url":null,"abstract":"With the channel length scaled down in CMOS process technology, the clock feedthrough will degrade the performance of a high-speed track-and-hold (T/H) circuit due to the thin-oxide gate leakage and parasitic overlapping capacitance. A 13.5 GSample/sec CMOS T/H circuit with clock feedthrough and charge injection cancellation is proposed. This T/H circuit has been fabricated in 90 nm CMOS process. It achieves 4-bit resolution from 250 MHz to 5 GHz analog input signal at 13.5 GSample/sec and dissipates 89 mW from single IV supply voltage.","PeriodicalId":137915,"journal":{"name":"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 4-Bit, 13.5GSample/sec Track-and-Hold Circuit\",\"authors\":\"I-Hsin Wang, Shen-Iuan Liu\",\"doi\":\"10.1109/VDAT.2007.373231\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the channel length scaled down in CMOS process technology, the clock feedthrough will degrade the performance of a high-speed track-and-hold (T/H) circuit due to the thin-oxide gate leakage and parasitic overlapping capacitance. A 13.5 GSample/sec CMOS T/H circuit with clock feedthrough and charge injection cancellation is proposed. This T/H circuit has been fabricated in 90 nm CMOS process. It achieves 4-bit resolution from 250 MHz to 5 GHz analog input signal at 13.5 GSample/sec and dissipates 89 mW from single IV supply voltage.\",\"PeriodicalId\":137915,\"journal\":{\"name\":\"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-04-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2007.373231\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2007.373231","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
With the channel length scaled down in CMOS process technology, the clock feedthrough will degrade the performance of a high-speed track-and-hold (T/H) circuit due to the thin-oxide gate leakage and parasitic overlapping capacitance. A 13.5 GSample/sec CMOS T/H circuit with clock feedthrough and charge injection cancellation is proposed. This T/H circuit has been fabricated in 90 nm CMOS process. It achieves 4-bit resolution from 250 MHz to 5 GHz analog input signal at 13.5 GSample/sec and dissipates 89 mW from single IV supply voltage.
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