T. Kawada, Y. Takahashi, N. Tsuda, M. Waki, N. Hagiwara
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A pattern matching processor array with defect tolerance
A 16b processor chip with sorter and 32Kb dictionary RAM has been developed for hand-printed Kanji character recognition. This paper will describe the design techniques used to achieve defect tolerance in the memory and logic blocks. A 18.5×20.5mm2chip contains 460,000 transistors using a 3μm double metal CMOS technology.