{"title":"CMOS输出缓冲器整形","authors":"L. Albertson, S. Whitaker, R. Merrell","doi":"10.1109/GLSV.1991.143987","DOIUrl":null,"url":null,"abstract":"The authors report a novel design technique to reduce output switching noise in CMOS VLSI circuits. The technique is based on analysis of the RLC equivalent circuit of the output driver stage. SPICE simulations verify the method's effectiveness and a test circuit is being submitted to MOSIS for fabrication.<<ETX>>","PeriodicalId":261873,"journal":{"name":"[1991] Proceedings. First Great Lakes Symposium on VLSI","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"CMOS output buffer waveshaping\",\"authors\":\"L. Albertson, S. Whitaker, R. Merrell\",\"doi\":\"10.1109/GLSV.1991.143987\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors report a novel design technique to reduce output switching noise in CMOS VLSI circuits. The technique is based on analysis of the RLC equivalent circuit of the output driver stage. SPICE simulations verify the method's effectiveness and a test circuit is being submitted to MOSIS for fabrication.<<ETX>>\",\"PeriodicalId\":261873,\"journal\":{\"name\":\"[1991] Proceedings. First Great Lakes Symposium on VLSI\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings. First Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLSV.1991.143987\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings. First Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLSV.1991.143987","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The authors report a novel design technique to reduce output switching noise in CMOS VLSI circuits. The technique is based on analysis of the RLC equivalent circuit of the output driver stage. SPICE simulations verify the method's effectiveness and a test circuit is being submitted to MOSIS for fabrication.<>