STI演示晶体管击穿电压和电气特性的解析解

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2014-04-28 DOI:10.1109/VLSI-TSA.2014.6839682

H. Tsai, Y. Yadav, R. Liou, K. Wu, Y. Lin, C. Lien

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引用次数: 0

摘要

制作了一种兼容CMOS的高压STI演示晶体管，并对其电学特性进行了研究。从理论上用一种方法求出这种二维STI演示结构的击穿电压。建立了击穿电压与N阱有效掺杂浓度NB和富集区宽度χa的关系模型。该模型的预测结果与实验数据和TCAD模拟结果吻合得很好。

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Analytical solutions for breakdown voltage and electrical characteristics of STI DEMOS transistors

A CMOS compatible high-voltage STI DEMOS transistor is fabricated and its electrical characteristics studied. A method is used to find the breakdown voltage of this two-dimensional STI DEMOS structure theoretically. A breakdown voltage model, which relates the breakdown voltage to the effective N well doping concentration NB and the width of the accumulation region χa, is derived. The predictions of this model agree very well with both the experimental data and with the TCAD simulations.

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Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

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