{"title":"风廓线雷达用共栅极电流复用拓扑低噪声放大器设计","authors":"B. Venkatesh Murthy, I. S. Rao","doi":"10.1109/INDICON.2014.7030475","DOIUrl":null,"url":null,"abstract":"This paper presents single stage design of low noise amplifier(LNA) common gate(CG) current reused topology using pseudomorphic high electron mobility transistors(pHEMT) for wind profiling radar application at 1.3 GHz. Though CG current reused topology is not sufficient for achieving the desired parameter of LNA such as noise figure, input and output return losses and stability, so source degenerated inductor topology is also used along with the current used topology for achieving desired parameter. Low loss and low cost RT/ duroid RO4003C substrate is used. The single stage LNA results show that overall gain (S21) of 22.149 dB and a noise figure of 0.364 dB. Input and output return losses are less than -10 dB and total power consumption is 180 mW. To perform the linearity, input intercept point (IIP3) and output intercept point (OIP3) is simulated as 31.01 dBm, 47.95 dBm respectively.","PeriodicalId":409794,"journal":{"name":"2014 Annual IEEE India Conference (INDICON)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Design of low noise amplifier using common gate current reused topology for wind profiling radar\",\"authors\":\"B. Venkatesh Murthy, I. S. Rao\",\"doi\":\"10.1109/INDICON.2014.7030475\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents single stage design of low noise amplifier(LNA) common gate(CG) current reused topology using pseudomorphic high electron mobility transistors(pHEMT) for wind profiling radar application at 1.3 GHz. Though CG current reused topology is not sufficient for achieving the desired parameter of LNA such as noise figure, input and output return losses and stability, so source degenerated inductor topology is also used along with the current used topology for achieving desired parameter. Low loss and low cost RT/ duroid RO4003C substrate is used. The single stage LNA results show that overall gain (S21) of 22.149 dB and a noise figure of 0.364 dB. Input and output return losses are less than -10 dB and total power consumption is 180 mW. To perform the linearity, input intercept point (IIP3) and output intercept point (OIP3) is simulated as 31.01 dBm, 47.95 dBm respectively.\",\"PeriodicalId\":409794,\"journal\":{\"name\":\"2014 Annual IEEE India Conference (INDICON)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 Annual IEEE India Conference (INDICON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/INDICON.2014.7030475\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Annual IEEE India Conference (INDICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDICON.2014.7030475","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of low noise amplifier using common gate current reused topology for wind profiling radar
This paper presents single stage design of low noise amplifier(LNA) common gate(CG) current reused topology using pseudomorphic high electron mobility transistors(pHEMT) for wind profiling radar application at 1.3 GHz. Though CG current reused topology is not sufficient for achieving the desired parameter of LNA such as noise figure, input and output return losses and stability, so source degenerated inductor topology is also used along with the current used topology for achieving desired parameter. Low loss and low cost RT/ duroid RO4003C substrate is used. The single stage LNA results show that overall gain (S21) of 22.149 dB and a noise figure of 0.364 dB. Input and output return losses are less than -10 dB and total power consumption is 180 mW. To perform the linearity, input intercept point (IIP3) and output intercept point (OIP3) is simulated as 31.01 dBm, 47.95 dBm respectively.