HDAP设计中的左shift验证

Chris Cone, Keith Felton, K. Rinebold, J. Ferguson
{"title":"HDAP设计中的左shift验证","authors":"Chris Cone, Keith Felton, K. Rinebold, J. Ferguson","doi":"10.23919/IWLPC.2019.8914101","DOIUrl":null,"url":null,"abstract":"High Density Advanced Package Design – or HDAP – continues to show remarkable advantages over monolithic SoC. Foundries and OSATs are teaming to provide manufacturing capabilities including FOWLP and various derivatives suitable for RF, IoT, automotive and mobile products or SI 3D 3DIC designs typically used in today's advanced memory and GPU/CPU applications. As HDAP manufacturing advances, so does design complexity requiring clearly defined and understood design methodologies. After providing an analysis the key steps to perform complex HDAP design including component aggregation, assembly and system optimization and design verification, this paper will highlight the requirement for a “shift-left” design environment where verification steps including LVS & LVL, thermal, power and signal integrity are performed interactively during the system integration and optimization and not left to after design completion.","PeriodicalId":373797,"journal":{"name":"2019 International Wafer Level Packaging Conference (IWLPC)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Shift-Left Vertification in HDAP Design\",\"authors\":\"Chris Cone, Keith Felton, K. Rinebold, J. Ferguson\",\"doi\":\"10.23919/IWLPC.2019.8914101\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High Density Advanced Package Design – or HDAP – continues to show remarkable advantages over monolithic SoC. Foundries and OSATs are teaming to provide manufacturing capabilities including FOWLP and various derivatives suitable for RF, IoT, automotive and mobile products or SI 3D 3DIC designs typically used in today's advanced memory and GPU/CPU applications. As HDAP manufacturing advances, so does design complexity requiring clearly defined and understood design methodologies. After providing an analysis the key steps to perform complex HDAP design including component aggregation, assembly and system optimization and design verification, this paper will highlight the requirement for a “shift-left” design environment where verification steps including LVS & LVL, thermal, power and signal integrity are performed interactively during the system integration and optimization and not left to after design completion.\",\"PeriodicalId\":373797,\"journal\":{\"name\":\"2019 International Wafer Level Packaging Conference (IWLPC)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 International Wafer Level Packaging Conference (IWLPC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/IWLPC.2019.8914101\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Wafer Level Packaging Conference (IWLPC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IWLPC.2019.8914101","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

高密度先进封装设计(High Density Advanced Package Design,简称HDAP)继续显示出优于单片SoC的显著优势。代工厂和osat正在合作提供制造能力,包括FOWLP和各种适用于射频,物联网,汽车和移动产品或SI 3D 3DIC设计的衍生产品,这些设计通常用于当今的高级内存和GPU/CPU应用。随着HDAP制造的进步,设计的复杂性也在增加,需要明确定义和理解的设计方法。在分析了执行复杂HDAP设计的关键步骤(包括组件聚合、装配和系统优化以及设计验证)之后,本文将强调对“左移”设计环境的要求,在系统集成和优化期间交互执行LVS & LVL、热、功率和信号完整性验证步骤,而不是在设计完成后进行。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Shift-Left Vertification in HDAP Design
High Density Advanced Package Design – or HDAP – continues to show remarkable advantages over monolithic SoC. Foundries and OSATs are teaming to provide manufacturing capabilities including FOWLP and various derivatives suitable for RF, IoT, automotive and mobile products or SI 3D 3DIC designs typically used in today's advanced memory and GPU/CPU applications. As HDAP manufacturing advances, so does design complexity requiring clearly defined and understood design methodologies. After providing an analysis the key steps to perform complex HDAP design including component aggregation, assembly and system optimization and design verification, this paper will highlight the requirement for a “shift-left” design environment where verification steps including LVS & LVL, thermal, power and signal integrity are performed interactively during the system integration and optimization and not left to after design completion.
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