50Mb/s CMOS光数据链路接收集成电路

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1986.1156874

J. Steininger, E. Swanson

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引用次数: 5

摘要

本报告将介绍一种采用1.5μm CMOS技术设计的光数据链路电路。工作速度从1Mb/s到50Mb/s，动态范围为60dB，输入电流有效值低至100nA。该芯片需要一个5V电源，并在内部为PIN二极管产生一个偏置电压。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 50Mb/s CMOS optical data link receiver integrated circuit

This report will cover an optical data link circuit designed in a 1.5μm CMOS technology. Operation is from 1Mb/s to 50Mb/s with a 60dB dynamic range: input currents are as low as 100nA rms. The chip requires a single 5V power supply and internally generates a bias voltage for the PIN diode.

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来源期刊

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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