{"title":"Kull脱毛层公式在结二极管紧凑模型中的应用","authors":"A. DiVergilio","doi":"10.1109/BCICTS45179.2019.8972733","DOIUrl":null,"url":null,"abstract":"This paper presents an application of the Kull-Nagel epilayer formulation for conductivity modulation to a compact model for junction diodes. This enhancement allows for improved accuracy in modeling the bias-dependence of the series resistance, a critical figure of merit for diodes used in RF and switching applications. The model is implemented in Verilog-A as an extension to the 3-terminal electrothermal diode model presented in an earlier work [1]. Hardware-verified results are demonstrated for a 90nm SiGe BiCMOS technology featuring an integrated PIN diode.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Application of the Kull epilayer formulation to a compact model for junction diodes\",\"authors\":\"A. DiVergilio\",\"doi\":\"10.1109/BCICTS45179.2019.8972733\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an application of the Kull-Nagel epilayer formulation for conductivity modulation to a compact model for junction diodes. This enhancement allows for improved accuracy in modeling the bias-dependence of the series resistance, a critical figure of merit for diodes used in RF and switching applications. The model is implemented in Verilog-A as an extension to the 3-terminal electrothermal diode model presented in an earlier work [1]. Hardware-verified results are demonstrated for a 90nm SiGe BiCMOS technology featuring an integrated PIN diode.\",\"PeriodicalId\":243314,\"journal\":{\"name\":\"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"volume\":\"71 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BCICTS45179.2019.8972733\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS45179.2019.8972733","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Application of the Kull epilayer formulation to a compact model for junction diodes
This paper presents an application of the Kull-Nagel epilayer formulation for conductivity modulation to a compact model for junction diodes. This enhancement allows for improved accuracy in modeling the bias-dependence of the series resistance, a critical figure of merit for diodes used in RF and switching applications. The model is implemented in Verilog-A as an extension to the 3-terminal electrothermal diode model presented in an earlier work [1]. Hardware-verified results are demonstrated for a 90nm SiGe BiCMOS technology featuring an integrated PIN diode.