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引用次数: 5
摘要
这项工作提出了一个完全集成的低降电压调节器，通过利用两种反馈机制实现快速瞬态响应。第一种反馈机制是包括误差放大器的模拟调节。第二种反馈机制是基于使用多个比较器对输出电压的任何快速变化进行数字化，并随后启用基于NMOS或基于PMOS的电流DAC。DAC提供的电流极性与负载电流的急剧瞬态变化相反。因此，负载电流的急剧变化由高速电流dac解决，而不受误差放大器性能的限制。LDO采用180nm CMOS技术器件实现。它使用的电源电压输入范围为1.6 V - 2.0 V，产生的输出电压为1.2 V。在仿真中，LDO稳压器在负载电流步长为100 mA时实现188 uA静态电流，-56 dB PSRR @ 1 KHz噪声频率和200 mV左右的输出压降。
This work presents a fully integrated low-drop out voltage regulator that achieves a fast-transient response by utilizing two feedback mechanisms. The first feedback mechanism is an analog regulation that includes an error amplifier. The second feedback mechanism is based on digitizing any fast change in the output voltage using multiple comparators and subsequently enabling either an NMOS based or a PMOS based current DAC. The DAC provides current in opposite polarity to the sharp transient change in load current. As a result, sharp changes in load current is addressed by high-speed current DACs and is not limited by the performance of the error amplifier. The LDO was implemented using 180nm CMOS technology devices. It uses a supply voltage input range of 1.6 V – 2.0 V and produces an output voltage of 1.2 V. In simulations, the LDO regulator achieves 188 uA quiescent current, -56 dB PSRR @ 1 KHz noise frequency and an output voltage drop of around 200 mV for a load current step of 100 mA.
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