用于安全硬件和IP所有权的FPGA

S. Tripathi, Abhishek Kumar, Mufti Mahmud
{"title":"用于安全硬件和IP所有权的FPGA","authors":"S. Tripathi, Abhishek Kumar, Mufti Mahmud","doi":"10.1109/EDKCON56221.2022.10032935","DOIUrl":null,"url":null,"abstract":"Reconfigurable nature of embedded FPGAs (EFPGA) are commonly used hardware for system-on-chip design due to additional features of upgradability, and security with high computational powers. SoC design with high portability EFPGA has the potential to replace time-consuming, less compatible full custom SoC design. Security is a major concern of designers to avoid illegal use of IPs for SoC design from external attacks or treats without paying charges to the owner. Security challenges are associated with bitstream loading on FPGA, design functionality, and onboard memory blocks. Several techniques are used to generate secured IP are explored mainly secured bitstream generation, generating physical unclonable functions (PUF), security protocol etc. Xilinx FPGA boards are frequently used for IP design prototyping with software like Vivado tool using HDLs. This paper is a comprehenssive study of current state of art of secured hardware design with FPGA.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"28 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"FPGA for secured hardware & IP ownership\",\"authors\":\"S. Tripathi, Abhishek Kumar, Mufti Mahmud\",\"doi\":\"10.1109/EDKCON56221.2022.10032935\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Reconfigurable nature of embedded FPGAs (EFPGA) are commonly used hardware for system-on-chip design due to additional features of upgradability, and security with high computational powers. SoC design with high portability EFPGA has the potential to replace time-consuming, less compatible full custom SoC design. Security is a major concern of designers to avoid illegal use of IPs for SoC design from external attacks or treats without paying charges to the owner. Security challenges are associated with bitstream loading on FPGA, design functionality, and onboard memory blocks. Several techniques are used to generate secured IP are explored mainly secured bitstream generation, generating physical unclonable functions (PUF), security protocol etc. Xilinx FPGA boards are frequently used for IP design prototyping with software like Vivado tool using HDLs. This paper is a comprehenssive study of current state of art of secured hardware design with FPGA.\",\"PeriodicalId\":296883,\"journal\":{\"name\":\"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)\",\"volume\":\"28 2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-11-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDKCON56221.2022.10032935\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDKCON56221.2022.10032935","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

嵌入式fpga (EFPGA)具有可重构特性,具有可升级性和高计算能力的安全性,是片上系统设计中常用的硬件。具有高可移植性EFPGA的SoC设计有可能取代耗时,兼容性较低的全定制SoC设计。安全性是设计人员的主要关注点,以避免非法使用ip进行SoC设计,免受外部攻击或治疗,而无需向所有者支付费用。安全性挑战与FPGA上的位流加载、设计功能和板载内存块有关。探讨了安全IP生成的几种技术,主要包括安全比特流生成、物理不可克隆函数生成、安全协议等。赛灵思FPGA板经常用于IP设计原型与软件,如Vivado工具使用hdl。本文对FPGA安全硬件设计的现状进行了较为全面的研究。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FPGA for secured hardware & IP ownership
Reconfigurable nature of embedded FPGAs (EFPGA) are commonly used hardware for system-on-chip design due to additional features of upgradability, and security with high computational powers. SoC design with high portability EFPGA has the potential to replace time-consuming, less compatible full custom SoC design. Security is a major concern of designers to avoid illegal use of IPs for SoC design from external attacks or treats without paying charges to the owner. Security challenges are associated with bitstream loading on FPGA, design functionality, and onboard memory blocks. Several techniques are used to generate secured IP are explored mainly secured bitstream generation, generating physical unclonable functions (PUF), security protocol etc. Xilinx FPGA boards are frequently used for IP design prototyping with software like Vivado tool using HDLs. This paper is a comprehenssive study of current state of art of secured hardware design with FPGA.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信