{"title":"用于安全硬件和IP所有权的FPGA","authors":"S. Tripathi, Abhishek Kumar, Mufti Mahmud","doi":"10.1109/EDKCON56221.2022.10032935","DOIUrl":null,"url":null,"abstract":"Reconfigurable nature of embedded FPGAs (EFPGA) are commonly used hardware for system-on-chip design due to additional features of upgradability, and security with high computational powers. SoC design with high portability EFPGA has the potential to replace time-consuming, less compatible full custom SoC design. Security is a major concern of designers to avoid illegal use of IPs for SoC design from external attacks or treats without paying charges to the owner. Security challenges are associated with bitstream loading on FPGA, design functionality, and onboard memory blocks. Several techniques are used to generate secured IP are explored mainly secured bitstream generation, generating physical unclonable functions (PUF), security protocol etc. Xilinx FPGA boards are frequently used for IP design prototyping with software like Vivado tool using HDLs. This paper is a comprehenssive study of current state of art of secured hardware design with FPGA.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"28 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"FPGA for secured hardware & IP ownership\",\"authors\":\"S. Tripathi, Abhishek Kumar, Mufti Mahmud\",\"doi\":\"10.1109/EDKCON56221.2022.10032935\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Reconfigurable nature of embedded FPGAs (EFPGA) are commonly used hardware for system-on-chip design due to additional features of upgradability, and security with high computational powers. SoC design with high portability EFPGA has the potential to replace time-consuming, less compatible full custom SoC design. Security is a major concern of designers to avoid illegal use of IPs for SoC design from external attacks or treats without paying charges to the owner. Security challenges are associated with bitstream loading on FPGA, design functionality, and onboard memory blocks. Several techniques are used to generate secured IP are explored mainly secured bitstream generation, generating physical unclonable functions (PUF), security protocol etc. Xilinx FPGA boards are frequently used for IP design prototyping with software like Vivado tool using HDLs. This paper is a comprehenssive study of current state of art of secured hardware design with FPGA.\",\"PeriodicalId\":296883,\"journal\":{\"name\":\"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)\",\"volume\":\"28 2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-11-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDKCON56221.2022.10032935\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDKCON56221.2022.10032935","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reconfigurable nature of embedded FPGAs (EFPGA) are commonly used hardware for system-on-chip design due to additional features of upgradability, and security with high computational powers. SoC design with high portability EFPGA has the potential to replace time-consuming, less compatible full custom SoC design. Security is a major concern of designers to avoid illegal use of IPs for SoC design from external attacks or treats without paying charges to the owner. Security challenges are associated with bitstream loading on FPGA, design functionality, and onboard memory blocks. Several techniques are used to generate secured IP are explored mainly secured bitstream generation, generating physical unclonable functions (PUF), security protocol etc. Xilinx FPGA boards are frequently used for IP design prototyping with software like Vivado tool using HDLs. This paper is a comprehenssive study of current state of art of secured hardware design with FPGA.