{"title":"用于多处理器工作站的VLSI路由框架","authors":"V. Sagar, R. Massara","doi":"10.1109/ISVD.1991.185097","DOIUrl":null,"url":null,"abstract":"With the coming of age of CAD workstations based on parallel hardware and the increasing need to accelerate CAD tools, there is a demand to exploit parallelism on general-purpose parallel hardware to achieve speedup. Hence, a novel VLSI routing framework was investigated for a parallel CAD workstation.<<ETX>>","PeriodicalId":183602,"journal":{"name":"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A VLSI routing framework for use on a multiprocessor workstation\",\"authors\":\"V. Sagar, R. Massara\",\"doi\":\"10.1109/ISVD.1991.185097\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the coming of age of CAD workstations based on parallel hardware and the increasing need to accelerate CAD tools, there is a demand to exploit parallelism on general-purpose parallel hardware to achieve speedup. Hence, a novel VLSI routing framework was investigated for a parallel CAD workstation.<<ETX>>\",\"PeriodicalId\":183602,\"journal\":{\"name\":\"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-01-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVD.1991.185097\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVD.1991.185097","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A VLSI routing framework for use on a multiprocessor workstation
With the coming of age of CAD workstations based on parallel hardware and the increasing need to accelerate CAD tools, there is a demand to exploit parallelism on general-purpose parallel hardware to achieve speedup. Hence, a novel VLSI routing framework was investigated for a parallel CAD workstation.<>