{"title":"用激光扫描仪成像LSI CMOS中的锁存位点","authors":"D. J. Burns, Jeffrey M. Kendall","doi":"10.1109/IRPS.1983.361971","DOIUrl":null,"url":null,"abstract":"A non-destructive laser photoscanning technique has been used to analyze electrically induced latch-up circuit paths in a variety of commercially available bulk CMOS devices. The method and results are compared to those reported by others using electron beam induced current and liquid crystal techniques.","PeriodicalId":334813,"journal":{"name":"21st International Reliability Physics Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1983-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Imaging Latch-Up Sites in LSI CMOS with a Laser Photoscanner\",\"authors\":\"D. J. Burns, Jeffrey M. Kendall\",\"doi\":\"10.1109/IRPS.1983.361971\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A non-destructive laser photoscanning technique has been used to analyze electrically induced latch-up circuit paths in a variety of commercially available bulk CMOS devices. The method and results are compared to those reported by others using electron beam induced current and liquid crystal techniques.\",\"PeriodicalId\":334813,\"journal\":{\"name\":\"21st International Reliability Physics Symposium\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1983-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"21st International Reliability Physics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.1983.361971\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"21st International Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.1983.361971","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Imaging Latch-Up Sites in LSI CMOS with a Laser Photoscanner
A non-destructive laser photoscanning technique has been used to analyze electrically induced latch-up circuit paths in a variety of commercially available bulk CMOS devices. The method and results are compared to those reported by others using electron beam induced current and liquid crystal techniques.
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