{"title":"模块放置在bsg结构和IC布局应用","authors":"S. Nakatake, K. Fujiyoshi, H. Murata, Y. Kajitani","doi":"10.1109/ICCAD.1996.569870","DOIUrl":null,"url":null,"abstract":"A new method of packing rectangles (modules) is presented with applications to IC layout design. It is based on the bounded-sliceline grid (BSG) structure. The BSG dissects the plane into rooms associated with binary relations \"right-to\"and \"above\" such that any two rooms are uniquely in either relation. A packing is obtained through an assignment of modules on the BSG. Followed by physical realization BSG-PACK. A simulated annealing searches for a goon packing of all packings by changing the assignments. Experiments showed that hundreds of rectangles are easily packed in a small rectangle area (chip) with quite good quality in area efficiency. A wide adaptability is demonstrated specific to IC layout design. Remarkable examples are: the chip is not necessarily rectangle, L-shaped modules and modules which are allowed to partially overlap each other can be handled.","PeriodicalId":408850,"journal":{"name":"Proceedings of International Conference on Computer Aided Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"275","resultStr":"{\"title\":\"Module placement on BSG-structure and IC layout applications\",\"authors\":\"S. Nakatake, K. Fujiyoshi, H. Murata, Y. Kajitani\",\"doi\":\"10.1109/ICCAD.1996.569870\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new method of packing rectangles (modules) is presented with applications to IC layout design. It is based on the bounded-sliceline grid (BSG) structure. The BSG dissects the plane into rooms associated with binary relations \\\"right-to\\\"and \\\"above\\\" such that any two rooms are uniquely in either relation. A packing is obtained through an assignment of modules on the BSG. Followed by physical realization BSG-PACK. A simulated annealing searches for a goon packing of all packings by changing the assignments. Experiments showed that hundreds of rectangles are easily packed in a small rectangle area (chip) with quite good quality in area efficiency. A wide adaptability is demonstrated specific to IC layout design. Remarkable examples are: the chip is not necessarily rectangle, L-shaped modules and modules which are allowed to partially overlap each other can be handled.\",\"PeriodicalId\":408850,\"journal\":{\"name\":\"Proceedings of International Conference on Computer Aided Design\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-11-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"275\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of International Conference on Computer Aided Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCAD.1996.569870\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of International Conference on Computer Aided Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1996.569870","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Module placement on BSG-structure and IC layout applications
A new method of packing rectangles (modules) is presented with applications to IC layout design. It is based on the bounded-sliceline grid (BSG) structure. The BSG dissects the plane into rooms associated with binary relations "right-to"and "above" such that any two rooms are uniquely in either relation. A packing is obtained through an assignment of modules on the BSG. Followed by physical realization BSG-PACK. A simulated annealing searches for a goon packing of all packings by changing the assignments. Experiments showed that hundreds of rectangles are easily packed in a small rectangle area (chip) with quite good quality in area efficiency. A wide adaptability is demonstrated specific to IC layout design. Remarkable examples are: the chip is not necessarily rectangle, L-shaped modules and modules which are allowed to partially overlap each other can be handled.