基于InP的dhbt的平面器件隔离

Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC. Pub Date : 2004-06-21 DOI:10.1109/DRC.2004.1367788

N. Parthasarathy, Y. Dong, D. Scott, M. Urteaga, M. Rodwell

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引用次数: 0

摘要

在台面技术中，基于InP的HBTs的器件隔离是通过蚀刻到衬底来完成的;这一过程缺乏平面性，并不能很好地实现高水平的整合。我们报道了两种利用选择性植入技术分离InP基HBTs的方法。第一种方法是通过注入Fe来隔离InP集电极-子集电极层。在第二种方法中，我们利用选择性Si注入到Si InP中，形成一个隔离的n++子集电极。

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Planar device isolation for InP based DHBTs

Device isolation of InP based HBTs in the mesa technology, is done by etching down to the substrate; this process suffers from lack of planarity and does not lend itself well to high levels of integration. We report on two techniques for planar isolation of InP based HBTs using selective implantation. The first method involves Fe implantation to isolate the InP collector-subcollector layers. In the second approach, we have utilized selective Si implantation in SI InP to form an isolated, N++ subcollector.

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Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC.

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