Young‐Kyun Cho, Sung Jun Lee, Seunghyun Jang, B. Park, J. Jung, Kwangchun Lee
{"title":"用于EPWM发射机的20 mhz带宽连续时间δ - σ调制器","authors":"Young‐Kyun Cho, Sung Jun Lee, Seunghyun Jang, B. Park, J. Jung, Kwangchun Lee","doi":"10.1109/ISWCS.2012.6328495","DOIUrl":null,"url":null,"abstract":"A 1.5-bit 20-MHz bandwidth continuous-time delta-sigma modulator (CT-DSM), which is suitable for envelope pulse-width modulation (EPWM) transmitters, is presented. To compensate the process-voltage-temperature variation, a resistor calibration method is proposed. The proposed calibration scheme improves a signal-to-quantization-noise-ratio (SQNR) by 18%. The switched capacitor digital-to-analog converter (DAC) and tri-level output DAC are adopted to improve non-ideal effects and implement multi-level encoding, respectively. Over 44 dB SQNR has been achieved for all corner simulation condition with an oversampling ratio of 13.056 and 20-MHz of bandwidth. The power consumption of the modulator is 11.6 mW from the 1.08 V supply. 1.74% of error vector magnitude can be obtained for a 20 MHz LTE signal with a 9.7 dB peak-to-average power ratio.","PeriodicalId":167119,"journal":{"name":"2012 International Symposium on Wireless Communication Systems (ISWCS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"20-MHz bandwidth continuous-time delta-sigma modulator for EPWM transmitter\",\"authors\":\"Young‐Kyun Cho, Sung Jun Lee, Seunghyun Jang, B. Park, J. Jung, Kwangchun Lee\",\"doi\":\"10.1109/ISWCS.2012.6328495\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 1.5-bit 20-MHz bandwidth continuous-time delta-sigma modulator (CT-DSM), which is suitable for envelope pulse-width modulation (EPWM) transmitters, is presented. To compensate the process-voltage-temperature variation, a resistor calibration method is proposed. The proposed calibration scheme improves a signal-to-quantization-noise-ratio (SQNR) by 18%. The switched capacitor digital-to-analog converter (DAC) and tri-level output DAC are adopted to improve non-ideal effects and implement multi-level encoding, respectively. Over 44 dB SQNR has been achieved for all corner simulation condition with an oversampling ratio of 13.056 and 20-MHz of bandwidth. The power consumption of the modulator is 11.6 mW from the 1.08 V supply. 1.74% of error vector magnitude can be obtained for a 20 MHz LTE signal with a 9.7 dB peak-to-average power ratio.\",\"PeriodicalId\":167119,\"journal\":{\"name\":\"2012 International Symposium on Wireless Communication Systems (ISWCS)\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Symposium on Wireless Communication Systems (ISWCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISWCS.2012.6328495\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Symposium on Wireless Communication Systems (ISWCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISWCS.2012.6328495","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
20-MHz bandwidth continuous-time delta-sigma modulator for EPWM transmitter
A 1.5-bit 20-MHz bandwidth continuous-time delta-sigma modulator (CT-DSM), which is suitable for envelope pulse-width modulation (EPWM) transmitters, is presented. To compensate the process-voltage-temperature variation, a resistor calibration method is proposed. The proposed calibration scheme improves a signal-to-quantization-noise-ratio (SQNR) by 18%. The switched capacitor digital-to-analog converter (DAC) and tri-level output DAC are adopted to improve non-ideal effects and implement multi-level encoding, respectively. Over 44 dB SQNR has been achieved for all corner simulation condition with an oversampling ratio of 13.056 and 20-MHz of bandwidth. The power consumption of the modulator is 11.6 mW from the 1.08 V supply. 1.74% of error vector magnitude can be obtained for a 20 MHz LTE signal with a 9.7 dB peak-to-average power ratio.
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