{"title":"电荷共享加法器及其在dram中的应用","authors":"Hak-soo Yu, Songjun Lee, J. Abraham","doi":"10.1109/ICCD.2000.878301","DOIUrl":null,"url":null,"abstract":"This paper develops a novel technique which uses charge sharing as a method to perform addition in memory arrays. DRAM cells are conventionally used as storage elements and their data read through charge sharing. In our approach, DRAM cells are used as arithmetic units, thus saving area and power consumption in system-on-silicon applications. An adder in DRAM is designed, and its HSPICE simulation results are presented to show the viability of the proposed scheme.","PeriodicalId":437697,"journal":{"name":"Proceedings 2000 International Conference on Computer Design","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An adder using charge sharing and its application in DRAMs\",\"authors\":\"Hak-soo Yu, Songjun Lee, J. Abraham\",\"doi\":\"10.1109/ICCD.2000.878301\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper develops a novel technique which uses charge sharing as a method to perform addition in memory arrays. DRAM cells are conventionally used as storage elements and their data read through charge sharing. In our approach, DRAM cells are used as arithmetic units, thus saving area and power consumption in system-on-silicon applications. An adder in DRAM is designed, and its HSPICE simulation results are presented to show the viability of the proposed scheme.\",\"PeriodicalId\":437697,\"journal\":{\"name\":\"Proceedings 2000 International Conference on Computer Design\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 2000 International Conference on Computer Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.2000.878301\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2000 International Conference on Computer Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.2000.878301","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An adder using charge sharing and its application in DRAMs
This paper develops a novel technique which uses charge sharing as a method to perform addition in memory arrays. DRAM cells are conventionally used as storage elements and their data read through charge sharing. In our approach, DRAM cells are used as arithmetic units, thus saving area and power consumption in system-on-silicon applications. An adder in DRAM is designed, and its HSPICE simulation results are presented to show the viability of the proposed scheme.
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