Ryota Yasudo, Takahiro Kagami, H. Amano, Y. Nakase, Masashi Watanabe, T. Oishi, Toru Shimizu, Tadao Nakamura
{"title":"一种低功耗NoC路由器，使用行军存储器直通类型","authors":"Ryota Yasudo, Takahiro Kagami, H. Amano, Y. Nakase, Masashi Watanabe, T. Oishi, Toru Shimizu, Tadao Nakamura","doi":"10.1109/CoolChips.2014.6842960","DOIUrl":null,"url":null,"abstract":"We have concluded that with a router using MMTH the power consumption is associated with the bit change rate of the data, and when NAS parallel benchmarks work on NoC, it is reduced by 42.4% on average at 2GHz compared with a traditional FIFO implementation. The performance degradation caused by the delay of the reading time can be mostly saved by the look-ahead technique in the router.","PeriodicalId":366328,"journal":{"name":"2014 IEEE COOL Chips XVII","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A low power NoC router using the marching memory through type\",\"authors\":\"Ryota Yasudo, Takahiro Kagami, H. Amano, Y. Nakase, Masashi Watanabe, T. Oishi, Toru Shimizu, Tadao Nakamura\",\"doi\":\"10.1109/CoolChips.2014.6842960\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have concluded that with a router using MMTH the power consumption is associated with the bit change rate of the data, and when NAS parallel benchmarks work on NoC, it is reduced by 42.4% on average at 2GHz compared with a traditional FIFO implementation. The performance degradation caused by the delay of the reading time can be mostly saved by the look-ahead technique in the router.\",\"PeriodicalId\":366328,\"journal\":{\"name\":\"2014 IEEE COOL Chips XVII\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-04-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE COOL Chips XVII\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CoolChips.2014.6842960\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE COOL Chips XVII","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CoolChips.2014.6842960","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low power NoC router using the marching memory through type
We have concluded that with a router using MMTH the power consumption is associated with the bit change rate of the data, and when NAS parallel benchmarks work on NoC, it is reduced by 42.4% on average at 2GHz compared with a traditional FIFO implementation. The performance degradation caused by the delay of the reading time can be mostly saved by the look-ahead technique in the router.
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