网络处理体系结构

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517) Pub Date : 2001-04-18 DOI:10.1109/VTSA.2001.934483

J. Williams

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引用次数: 18

摘要

包处理是大多数网络设备的核心。网络处理器(NP)承诺能够以微处理器的灵活性执行数据包处理，但具有专用ASIC的性能。在本文中，我们调查了大多数商用NPs的共同架构特征。NP是一种经过优化的可编程处理器，用于在网络设备中以线速率执行分组处理。这是可编程处理器与专用硬件之间的经典权衡。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Architectures for network processing

Packet processing is the heart of most networking equipment. The network processor (NP) promises the ability to perform packet processing with the flexibility of a microprocessor but with the performance of a dedicated ASIC. In this paper, we survey common architectural features of most commercially available NPs. The NP is a programmable processor optimized to perform packet processing at wire rates in networking equipment. It is a classic tradeoff in the continuum of programmable processors verses dedicated hardware.

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来源期刊

2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517)

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