高速采样系统的抖动分析

M. Shinagawa, Y. Akazawa, T. Wakimoto
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引用次数: 105

摘要

1.最近大规模集成电路技术的进步导致了电子学的重大改进。用于a - d转换器。尤其是。不仅达到了超过90 dB [I]的高精度,而且还实现了6bit[2]的2ghz超高速。转换器的精度和速度限制显然很重要。抖动问题被认为是影响变换器精度和速度的主要限制因素。本文将介绍我们对这些问题的研究。首先,建立了实际采样系统的抖动生成模型。包括信号和时钟发生器抖动。将被提议。基于这个模型。给出了一种高精度的抖动测量方法。这也使得每个抖动组件可以被分离。最后。将讨论转换器的精度和速度限制。研究还表明,在减小抖动和运行速度之间进行有效的带宽补偿对于更高级的变换器设计是非常重要的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Jitter analysis of high speed sampling systems
1.Introductlon Recent LSI technology advances have resulted in major improvements in electronics. For A-to-D converters. particularly. not only a very high precision over 90 dB [I] but also an ultra high speed of 2 GHz for 6bit [2] have already been achieved. Accuracy and speed limitations of the converters are obviously important. Jitter problems are thought to be the principle limiting factors on the accuracy and speed of the converter. In this paper, our research penaining to these problems will be presented. First, a jitter generation model far a practical sampling system. including signal and clock generator jitter. will be proposed. Based on this model. a precision jitter measurement method is shown. which also enables each jitter component to be separated. Finally. accuracy and speed limitations of the converter will be discussed. and it will also be shown that effective band-width compro-ation between jitter reduction and operating speed are important for more advanced converter design.
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