在一个先进的电介质蚀刻反应器的性能和生产力的提高,为低于0.3 /spl μ m的应用

M. Srinivasan, R. Caple, G. Hills, G. Mueller, T. Nguyen, E. Wagganer
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引用次数: 0

摘要

介质膜蚀刻是半导体加工中最具挑战性的方面之一。目前,电介质蚀刻反应器必须能够处理一系列的电介质,如掺杂和未掺杂的硅玻璃、氮化硅、有机抗反射层和以有机成分为主的低k介电材料。成功的蚀刻工具执行接触、自对准接触(SAC)、通孔和双阻尼结构所需的“关键”步骤,以及前缘0.25 /spl mu/m生成设备在进入批量生产时所需的隔离和钝化等不太关键的步骤。最后,所有蚀刻都必须具有成本效益,用标准的拥有成本(COO)和整体设备效率(OEE)来衡量。在本文中,我们描述了如何使用这些指标为Lam Research的4520XL/sub E//sup TM/先进电介质反应器生成几个产品改进程序。对于低于0.3 /spl mu/m的特征尺寸设备,显示了工艺和生产率的改进。这些改进表明4520XL/sub E/反应器的适用性有望扩展到低于0.2 /spl mu/m的特征尺寸。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performance and productivity improvements in an advanced dielectric etch reactor for sub 0.3 /spl mu/m applications
Dielectric film etching represents one of the most challenging aspects of semiconductor processing. At present, a dielectric etch reactor must be capable of handling a range of dielectrics, such as doped and undoped silica glass, silicon nitride, organic anti-reflection layers and low-k dielectric materials of a predominantly organic composition. Successful etch tools perform the "critical" steps required for contact, self-aligned contact (SAC), via and dual damascene structures as well as the less critical steps such as spacers and passivation that are required by leading edge 0.25 /spl mu/m generation devices as they enter volume production. Finally, all the etches must be cost effective as measured with the standard metrics of cost of ownership (COO), and overall equipment effectiveness (OEE). In this paper, we describe how these metrics have been used to generate several product improvement programs for an advanced dielectric reactor, the 4520XL/sub E//sup TM/ from Lam Research. Both process and productivity improvements are shown for sub-0.3 /spl mu/m feature size devices. These improvements show promise for extension of the applicability of the 4520XL/sub E/ reactor to sub-0.2 /spl mu/m feature sizes.
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