模拟解复用器工作速度高达200gs /s,使用四个时间交错开关发射器跟随器,占空比为50%

P. Thomas, M. Grözing, M. Berroth
{"title":"模拟解复用器工作速度高达200gs /s,使用四个时间交错开关发射器跟随器,占空比为50%","authors":"P. Thomas, M. Grözing, M. Berroth","doi":"10.1109/BCICTS50416.2021.9682471","DOIUrl":null,"url":null,"abstract":"This paper presents the design and experimental results of a voltage mode analog demultiplexer (ADeMUX) that uses four time interleaved switched emitter follower track-and-hold (T/H) circuits. The preamplifiers and sampling cores are linearized for ultra-broadband operation. With the utilized 90-nm SiGe-BiCMOS technology offering 300 GHz fT and 480 GHz fmax, we are able to operate the ADeMUX with up to 4 x 50 GS/s = 200 GS/s - the highest reported sampling rate to date. Compared with the state-of-the-art current mode ADeMUX circuits, the presented device offers an increase in sampling rate of more than 50%. At 128 GS/s, the chip shows the highest input bandwidth of more than 50 GHz and a linearity of more than 3 bit. This ultra-broadband analog time interleaver can be used to feed four analog-to-digital converters in CMOS technology, due to the reduced bandwidth requirement of only 16 GHz for operation at 128 GS/s or 25 GHz for 200 GS/s.","PeriodicalId":284660,"journal":{"name":"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Analog Demultiplexer Operating at up to 200 GS/s Using Four Time Interleaved Switched Emitter Followers with a 50% Duty Cycle Clock\",\"authors\":\"P. Thomas, M. Grözing, M. Berroth\",\"doi\":\"10.1109/BCICTS50416.2021.9682471\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design and experimental results of a voltage mode analog demultiplexer (ADeMUX) that uses four time interleaved switched emitter follower track-and-hold (T/H) circuits. The preamplifiers and sampling cores are linearized for ultra-broadband operation. With the utilized 90-nm SiGe-BiCMOS technology offering 300 GHz fT and 480 GHz fmax, we are able to operate the ADeMUX with up to 4 x 50 GS/s = 200 GS/s - the highest reported sampling rate to date. Compared with the state-of-the-art current mode ADeMUX circuits, the presented device offers an increase in sampling rate of more than 50%. At 128 GS/s, the chip shows the highest input bandwidth of more than 50 GHz and a linearity of more than 3 bit. This ultra-broadband analog time interleaver can be used to feed four analog-to-digital converters in CMOS technology, due to the reduced bandwidth requirement of only 16 GHz for operation at 128 GS/s or 25 GHz for 200 GS/s.\",\"PeriodicalId\":284660,\"journal\":{\"name\":\"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-12-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BCICTS50416.2021.9682471\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS50416.2021.9682471","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

本文介绍了一种电压模式模拟解复用器(ADeMUX)的设计和实验结果,该电路采用四个时间交错开关发射极跟随器跟踪保持(T/H)电路。前置放大器和采样核经过线性化处理,可用于超宽带工作。利用90纳米SiGe-BiCMOS技术,提供300 GHz fT和480 GHz fmax,我们能够以高达4 x 50 GS/s = 200 GS/s的速度运行ADeMUX,这是迄今为止报道的最高采样率。与目前最先进的电流模式ADeMUX电路相比,该器件的采样率提高了50%以上。在128 GS/s时,芯片显示出超过50 GHz的最高输入带宽和超过3位的线性度。这种超宽带模拟时间交织器可用于为CMOS技术中的四个模数转换器提供馈电,因为在128 GS/s或200 GS/s时,带宽要求仅为16 GHz或25 GHz。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Analog Demultiplexer Operating at up to 200 GS/s Using Four Time Interleaved Switched Emitter Followers with a 50% Duty Cycle Clock
This paper presents the design and experimental results of a voltage mode analog demultiplexer (ADeMUX) that uses four time interleaved switched emitter follower track-and-hold (T/H) circuits. The preamplifiers and sampling cores are linearized for ultra-broadband operation. With the utilized 90-nm SiGe-BiCMOS technology offering 300 GHz fT and 480 GHz fmax, we are able to operate the ADeMUX with up to 4 x 50 GS/s = 200 GS/s - the highest reported sampling rate to date. Compared with the state-of-the-art current mode ADeMUX circuits, the presented device offers an increase in sampling rate of more than 50%. At 128 GS/s, the chip shows the highest input bandwidth of more than 50 GHz and a linearity of more than 3 bit. This ultra-broadband analog time interleaver can be used to feed four analog-to-digital converters in CMOS technology, due to the reduced bandwidth requirement of only 16 GHz for operation at 128 GS/s or 25 GHz for 200 GS/s.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信