G. Thareja, A. Pal, Xingye Wang, S. Dag, S. You, Shashank Sharma, Qing Zhu, C. L. Cervantes, Shinjae Hwang, Matthew Spuller, B. Ng, Pradeep S. Kumar, N. Tam, M. Gage, S. Deshpande, Zhiyuan Wu, A. Jansen, Liton Dey, Feng Chen, Xianjin Xie, K. Kashefizadeh, V. Reddy, Andy Lo, Zhebo Chen, S. Huey, Jianshe Tang, He Ren, M. Naik, Brian Brown, S. Kesapragada, Buvna Ayyagari-Sangamalli, E. Bazizi, Xianmin Tang
{"title":"BEOL互连创新:3nm及以上节点的材料、工艺和系统协同优化","authors":"G. Thareja, A. Pal, Xingye Wang, S. Dag, S. You, Shashank Sharma, Qing Zhu, C. L. Cervantes, Shinjae Hwang, Matthew Spuller, B. Ng, Pradeep S. Kumar, N. Tam, M. Gage, S. Deshpande, Zhiyuan Wu, A. Jansen, Liton Dey, Feng Chen, Xianjin Xie, K. Kashefizadeh, V. Reddy, Andy Lo, Zhebo Chen, S. Huey, Jianshe Tang, He Ren, M. Naik, Brian Brown, S. Kesapragada, Buvna Ayyagari-Sangamalli, E. Bazizi, Xianmin Tang","doi":"10.23919/VLSITechnologyandCir57934.2023.10185299","DOIUrl":null,"url":null,"abstract":"We present novel back-end-of-line (BEOL) copper interconnect integration for advanced technology nodes using integrated selective barrier copper barrier seed (CuBS) process, annealing and chemical mechanical planarization (CMP). Electrical tests (resistance, reliability) combined with Materials-to-Systems Co-Optimization (MSCO™) simulations confirm significant power-performance-area (PPA) gains for 3nm technology node and beyond.","PeriodicalId":317958,"journal":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"BEOL Interconnect Innovation: Materials, Process and Systems Co-optimization for 3nm Node and Beyond\",\"authors\":\"G. Thareja, A. Pal, Xingye Wang, S. Dag, S. You, Shashank Sharma, Qing Zhu, C. L. Cervantes, Shinjae Hwang, Matthew Spuller, B. Ng, Pradeep S. Kumar, N. Tam, M. Gage, S. Deshpande, Zhiyuan Wu, A. Jansen, Liton Dey, Feng Chen, Xianjin Xie, K. Kashefizadeh, V. Reddy, Andy Lo, Zhebo Chen, S. Huey, Jianshe Tang, He Ren, M. Naik, Brian Brown, S. Kesapragada, Buvna Ayyagari-Sangamalli, E. Bazizi, Xianmin Tang\",\"doi\":\"10.23919/VLSITechnologyandCir57934.2023.10185299\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present novel back-end-of-line (BEOL) copper interconnect integration for advanced technology nodes using integrated selective barrier copper barrier seed (CuBS) process, annealing and chemical mechanical planarization (CMP). Electrical tests (resistance, reliability) combined with Materials-to-Systems Co-Optimization (MSCO™) simulations confirm significant power-performance-area (PPA) gains for 3nm technology node and beyond.\",\"PeriodicalId\":317958,\"journal\":{\"name\":\"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185299\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185299","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}