Insertion-Loss Optimization of Transformer-based Matching Networks for mm-Wave Applications

A new design methodology for insertion-loss (IL) optimization of transformer-based input matching networks is presented in this paper. With respect to a particular load impedance, the optimum transformer (TF) specifications, i.e. primary and secondary inductance $L_{p}$ and $L_{s}$ and the coupling factor $k$, can be determined. As a design example, this approach is presented for an integrated planar TF topology in a 65 nm CMOS process. It is verified by EM co-simulations in ADS Momentum at a centre frequency of 60 GHz.