Mitigating register pressure in GPU kernels for improved energy efficiency

GPUs have become an integral part of modern HPC systems. As the HPC landscape moves toward over-provisioned systems with heterogeneous compute nodes, the importance of GPUs is likely to grow. Therefore, strategies for energy savings on these devices are of critical importance. In this paper, we examine the energy efficiency of the register file on current GPUs. We show that ineffective utilization of the register file not only degrades performance but also increases power consumption. To address this problem, we develop a multi-level approach for mitigating register pressure in GPU kernels. Our strategy includes a source-to-source data layout transformation, a method for modulating register pressure (RP) via compiler optimizations, and an autotuner for selecting RP-sensitive kernel launch configurations. Experimental results show that our strategy is able to curb inefficiency in register file usage and can significantly boost performance and energy efficiency in a range of GPU kernels.