A Reconfigurable Multi-function DMA Controller for High-Performance Computing Systems

Huge bandwidth demand along with the requirement to synchronize data structures between different processing structures in multiprocessor system-on-chip (MPSoC) lead to the need to design dedicated memory access controllers. This paper presents the design of a reconfigurable multi-function memory direct memory controller (ReDMAC) for high-performance MPSoCs. The ReDMAC supports the capability of dynamic reconfiguration by enabling the hardware fabrics to be synthesized into various functions even if the system is working. The ReDMAC can support four operating modes, including direct memory access, matrix transposing, data sorting, and matrix merging. The ReDMAC has been modeled at the Register Transfer Level (RTL) using VHDL language. The controller has been simulated and evaluated on reconfigurability to work with individual functions. The controller is also synthesized with the Synopsys Design Compiler tool to compare hardware costs with the independent implementation of each individual function. Simulation and synthesis results indicate that the proposed design meets the required functionality, while the area of the controller decreases about three times compared to total area of independent function cores.