Giacomo Paci, P. Marchal, Francesco Poletti, L. Benini
{"title":"探索低功耗mpsoc的“温度感知”设计","authors":"Giacomo Paci, P. Marchal, Francesco Poletti, L. Benini","doi":"10.1109/DATE.2006.243741","DOIUrl":null,"url":null,"abstract":"The power density inside high performance systems continues to rise with every process technology generation, thereby increasing the operating temperature and creating “hot spots” on the die. As a result, the performance, reliability and power consumption of the system degrade. To avoid these “hot spots”, “temperature-aware” design has become a must. For low-power embedded systems though, it is not clear whether similar thermal problems occur. These systems have very different characteristics from the high performance ones: they consume hundred times less power, they are based on a multi-processor architecture with lots of embedded memory and rely on cheap packaging solutions. In this paper, we investigate the need for temperature-aware design in a low-power systems-on-a-chip and provide guidlines to delimit the conditions for which temperature aware design is needed.","PeriodicalId":205976,"journal":{"name":"Design, Automation and Test in Europe","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"73","resultStr":"{\"title\":\"Exploring \\\"temperature-aware\\\" design in low-power MPSoCs\",\"authors\":\"Giacomo Paci, P. Marchal, Francesco Poletti, L. Benini\",\"doi\":\"10.1109/DATE.2006.243741\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The power density inside high performance systems continues to rise with every process technology generation, thereby increasing the operating temperature and creating “hot spots” on the die. As a result, the performance, reliability and power consumption of the system degrade. To avoid these “hot spots”, “temperature-aware” design has become a must. For low-power embedded systems though, it is not clear whether similar thermal problems occur. These systems have very different characteristics from the high performance ones: they consume hundred times less power, they are based on a multi-processor architecture with lots of embedded memory and rely on cheap packaging solutions. In this paper, we investigate the need for temperature-aware design in a low-power systems-on-a-chip and provide guidlines to delimit the conditions for which temperature aware design is needed.\",\"PeriodicalId\":205976,\"journal\":{\"name\":\"Design, Automation and Test in Europe\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-03-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"73\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Design, Automation and Test in Europe\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DATE.2006.243741\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Design, Automation and Test in Europe","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DATE.2006.243741","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Exploring "temperature-aware" design in low-power MPSoCs
The power density inside high performance systems continues to rise with every process technology generation, thereby increasing the operating temperature and creating “hot spots” on the die. As a result, the performance, reliability and power consumption of the system degrade. To avoid these “hot spots”, “temperature-aware” design has become a must. For low-power embedded systems though, it is not clear whether similar thermal problems occur. These systems have very different characteristics from the high performance ones: they consume hundred times less power, they are based on a multi-processor architecture with lots of embedded memory and rely on cheap packaging solutions. In this paper, we investigate the need for temperature-aware design in a low-power systems-on-a-chip and provide guidlines to delimit the conditions for which temperature aware design is needed.