{"title":"利用三值锁存器亚稳态的亚微瓦真随机数发生器","authors":"S. Tao, E. Dubrova","doi":"10.1109/ISMVL.2017.10","DOIUrl":null,"url":null,"abstract":"True random number generators (TRNGs) are important hardware primitives required for many applications including cryptography, communication, and statistical simulation. This paper presents a TRNG with failure detection capability targeting cryptographic applications with a limited power budget. The proposed TRNG extracts entropy from latch comparators, whose metastable states are detected and encoded as an additional alarm bit leading to ternary valued outputs. Furthermore, several such ternary valued latches (TVLs) are employed in an N-modular redundant configuration to address the bias problem caused by unmatched conditions. The statistical properties of the proposed TVL-TRNG are examined by the NIST 800-22 and NIST 800-90B test suits showing resistance against environmental changes and process variations. The proposed TRNG circuit designed in 65 nm CMOS consumes 825.36 nW at 1 Mbps.","PeriodicalId":393724,"journal":{"name":"2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"TVL-TRNG: Sub-Microwatt True Random Number Generator Exploiting Metastability in Ternary Valued Latches\",\"authors\":\"S. Tao, E. Dubrova\",\"doi\":\"10.1109/ISMVL.2017.10\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"True random number generators (TRNGs) are important hardware primitives required for many applications including cryptography, communication, and statistical simulation. This paper presents a TRNG with failure detection capability targeting cryptographic applications with a limited power budget. The proposed TRNG extracts entropy from latch comparators, whose metastable states are detected and encoded as an additional alarm bit leading to ternary valued outputs. Furthermore, several such ternary valued latches (TVLs) are employed in an N-modular redundant configuration to address the bias problem caused by unmatched conditions. The statistical properties of the proposed TVL-TRNG are examined by the NIST 800-22 and NIST 800-90B test suits showing resistance against environmental changes and process variations. The proposed TRNG circuit designed in 65 nm CMOS consumes 825.36 nW at 1 Mbps.\",\"PeriodicalId\":393724,\"journal\":{\"name\":\"2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.2017.10\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.2017.10","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
TVL-TRNG: Sub-Microwatt True Random Number Generator Exploiting Metastability in Ternary Valued Latches
True random number generators (TRNGs) are important hardware primitives required for many applications including cryptography, communication, and statistical simulation. This paper presents a TRNG with failure detection capability targeting cryptographic applications with a limited power budget. The proposed TRNG extracts entropy from latch comparators, whose metastable states are detected and encoded as an additional alarm bit leading to ternary valued outputs. Furthermore, several such ternary valued latches (TVLs) are employed in an N-modular redundant configuration to address the bias problem caused by unmatched conditions. The statistical properties of the proposed TVL-TRNG are examined by the NIST 800-22 and NIST 800-90B test suits showing resistance against environmental changes and process variations. The proposed TRNG circuit designed in 65 nm CMOS consumes 825.36 nW at 1 Mbps.