CPU芯片板载模块

Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93) Pub Date : 1993-06-01 DOI:10.1109/ECTC.1993.346859

K. Yamada, A. Tanaka, H. Shinohara, M. Honda, T. Hatada, A. Yamagiwa, Y. Shirai

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引用次数: 3

摘要

介绍了一种用于中低端计算机的CPU片上模块。该模块由一个CPU裸芯片、封装在SOJ中的24个ram和一些旁路电容器组成。该模块基板是由亚胺三嗪树脂制成的印刷电路板(PCB)。该模块(156mm /spl倍/ 58mm)由4个信号金属层和4个电源/接地金属层组成。在PCB板的中央位置形成一个17mm /spl × / 17mm的方形通孔，用于安装CPU。在PCB板背面粘上导热金属，盖住方孔，将CPU芯片粘在金属板上。在0.4 m/s风速下，热阻可小于2/spl度/C/W。对该模块的电学特性进行了数值分析，结果表明，与采用引脚网格阵列封装的子板型模块相比，该模块从CPU到缓存存储器的信号延迟时间减少了10%。据估计，与子板型模块相比，同时开关噪声可降低60%。

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A CPU chip-on-board module

A CPU chip-on-board module for low and mid-range computers is described. The module consists of a CPU bare chip, 24 SRAMs packaged in the SOJ and some bypass capacitors. The module substrate is a printed circuit board (PCB) made of imide-triazine resin. The module (156 mm/spl times/58 mm) consists of four signal metal layers and four power/ground metal layers. A square through hole (17 mm/spl times/17 mm) for the CPU is formed in the central part of the PCB. A thermal spreading metal is glued to the PCB from the rear side, covering the square hole, and the CPU chip is die-bonded on the metal plate. The thermal resistance can be made smaller than 2/spl deg/C/W at a 0.4 m/s of wind velocity. Numerical analysis of electrical characteristics of the module shows that it can reduce signal delay time from the CPU to cache memories by 10% compared with that of a daughter board type module with the CPU packaged in a pin grid array. It is estimated that simultaneously switched noise can be reduced by 60% from that of the daughter board type module.<>

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来源期刊

Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93)

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